{
        u32 status;
 
-       disable_irq_nosync(irq);
-
        status = ath79_reset_rr(AR934X_RESET_REG_PCIE_WMAC_INT_STATUS);
 
        if (status & AR934X_PCIE_WMAC_INT_PCIE_ALL) {
        } else {
                spurious_interrupt();
        }
-
-       enable_irq(irq);
 }
 
 static void ar934x_ip2_irq_init(void)
 {
        u32 status;
 
-       disable_irq_nosync(irq);
-
        status = ath79_reset_rr(QCA955X_RESET_REG_EXT_INT_STATUS);
        status &= QCA955X_EXT_INT_PCIE_RC1_ALL | QCA955X_EXT_INT_WMAC_ALL;
 
        if (status == 0) {
                spurious_interrupt();
-               goto enable;
+               return;
        }
 
        if (status & QCA955X_EXT_INT_PCIE_RC1_ALL) {
                /* TODO: flush DDR? */
                generic_handle_irq(ATH79_IP2_IRQ(1));
        }
-
-enable:
-       enable_irq(irq);
 }
 
 static void qca955x_ip3_irq_dispatch(unsigned int irq, struct irq_desc *desc)
 {
        u32 status;
 
-       disable_irq_nosync(irq);
-
        status = ath79_reset_rr(QCA955X_RESET_REG_EXT_INT_STATUS);
        status &= QCA955X_EXT_INT_PCIE_RC2_ALL |
                  QCA955X_EXT_INT_USB1 |
 
        if (status == 0) {
                spurious_interrupt();
-               goto enable;
+               return;
        }
 
        if (status & QCA955X_EXT_INT_USB1) {
                /* TODO: flush DDR? */
                generic_handle_irq(ATH79_IP3_IRQ(2));
        }
-
-enable:
-       enable_irq(irq);
 }
 
 static void qca955x_irq_init(void)