arm64: zynqmp: Enable gpio and qspi for zc1275-revA

Add missing gpio and qspio for zc1275-revA board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/839d833133318feeb2755c4431204b0ef4788cce.1628244299.git.michal.simek@xilinx.com

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1275-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1275-revA.dts
index 66a90483b00435875f6a8775f99e0c715f20555a..e971ba8c14187db67a1b2dc270b5b77d94494ee0 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1275-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1275-revA.dts
@@ -2,7 +2,7 @@
 /*
  * dts file for Xilinx ZynqMP ZC1275
  *
- * (C) Copyright 2017 - 2019, Xilinx, Inc.
+ * (C) Copyright 2017 - 2021, Xilinx, Inc.
  *
  * Michal Simek <michal.simek@xilinx.com>
  * Siva Durga Prasad Paladugu <sivadur@xilinx.com>
@@ -20,6 +20,7 @@
        aliases {
                serial0 = &uart0;
                serial1 = &dcc;
+               spi0 = &qspi;
        };
 
        chosen {
@@ -37,6 +38,21 @@
        status = "okay";
 };
 
+&gpio {
+       status = "okay";
+};
+
+&qspi {
+       status = "okay";
+       flash@0 {
+               compatible = "m25p80", "jedec,spi-nor";
+               reg = <0x0>;
+               spi-tx-bus-width = <1>;
+               spi-rx-bus-width = <4>;
+               spi-max-frequency = <108000000>;
+       };
+};
+
 &uart0 {
        status = "okay";
 };