}
        return 1;
 }
+EXPORT_SYMBOL(cxgbi_ppm_release);
 
 static struct cxgbi_ppm_pool *ppm_alloc_cpu_pool(unsigned int *total,
                                                 unsigned int *pcpu_ppmax)
 
        return 1 << (bits + PPOD_IDX_SHIFT);
 }
+EXPORT_SYMBOL(cxgbi_tagmask_set);
 
 MODULE_AUTHOR("Chelsio Communications");
 MODULE_DESCRIPTION("Chelsio common library");
 
        }
 
        ppmax = (uinfo.ulimit - uinfo.llimit + 1) >> PPOD_SIZE_SHIFT;
+       tagmask = cxgbi_tagmask_set(ppmax);
 
        pr_info("T3 %s: 0x%x~0x%x, 0x%x, tagmask 0x%x -> 0x%x.\n",
                ndev->name, uinfo.llimit, uinfo.ulimit, ppmax, uinfo.tagmask,
 
                "cdev 0x%p, p# %u.\n", cdev, cdev->nports);
        cxgbi_hbas_remove(cdev);
        cxgbi_device_portmap_cleanup(cdev);
+       cxgbi_ppm_release(cdev->cdev2ppm(cdev));
        if (cdev->pmap.max_connect)
                cxgbi_free_big_mem(cdev->pmap.port_csk);
        kfree(cdev);
 
        struct cxgbit_device *cdev;
 
        cdev = container_of(kref, struct cxgbit_device, kref);
+
+       cxgbi_ppm_release(cdev2ppm(cdev));
        kfree(cdev);
 }