net: mediatek: sgmii: fix duplex configuration

The logic of the duplex bit is inverted.  Setting it means half
duplex, not full duplex.

Fix and rename macro to avoid confusion.

Fixes: 7e538372694b ("net: ethernet: mediatek: Re-add support SGMII")
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Acked-by: Daniel Golle <daniel@makrotopia.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
index 01a38f5145b1023ef5c75133ce737a964465f0ea..2d9186d32bc0932e2d0262fdf0bbadbec9577bee 100644 (file)
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -519,7 +519,7 @@
 #define SGMII_SPEED_10                 FIELD_PREP(SGMII_SPEED_MASK, 0)
 #define SGMII_SPEED_100                        FIELD_PREP(SGMII_SPEED_MASK, 1)
 #define SGMII_SPEED_1000               FIELD_PREP(SGMII_SPEED_MASK, 2)
-#define SGMII_DUPLEX_FULL              BIT(4)
+#define SGMII_DUPLEX_HALF              BIT(4)
 #define SGMII_IF_MODE_BIT5             BIT(5)
 #define SGMII_REMOTE_FAULT_DIS         BIT(8)
 #define SGMII_CODE_SYNC_SET_VAL                BIT(9)

diff --git a/drivers/net/ethernet/mediatek/mtk_sgmii.c b/drivers/net/ethernet/mediatek/mtk_sgmii.c
index 0a06995099cfcab346c7ea128acc0f2a3735ff7c..c4261069b5215a411cbd8877b43de830677b5d03 100644 (file)
--- a/drivers/net/ethernet/mediatek/mtk_sgmii.c
+++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c
@@ -154,11 +154,11 @@ static void mtk_pcs_link_up(struct phylink_pcs *pcs, unsigned int mode,
                else
                        sgm_mode = SGMII_SPEED_1000;
 
-               if (duplex == DUPLEX_FULL)
-                       sgm_mode |= SGMII_DUPLEX_FULL;
+               if (duplex != DUPLEX_FULL)
+                       sgm_mode |= SGMII_DUPLEX_HALF;
 
                regmap_update_bits(mpcs->regmap, SGMSYS_SGMII_MODE,
-                                  SGMII_DUPLEX_FULL | SGMII_SPEED_MASK,
+                                  SGMII_DUPLEX_HALF | SGMII_SPEED_MASK,
                                   sgm_mode);
        }
 }