drm/amd/display: Add DFS reference clock field

Add to clk_mgr_internal struct, for future use.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h b/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h
index 4b5505fa980ceea0dd617d372397a73c6cc008c5..213046de16757f75d5da468bca03a272f4245302 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h
@@ -216,6 +216,8 @@ struct clk_mgr_internal {
        bool dfs_bypass_enabled;
        /* True if the DFS-bypass feature is enabled and active. */
        bool dfs_bypass_active;
+
+       uint32_t dfs_ref_freq_khz;
        /*
         * Cache the display clock returned by VBIOS if DFS-bypass is enabled.
         * This is basically "Crystal Frequency In KHz" (XTALIN) frequency