KVM: arm64: Add helpers to determine if PMC counts at a given EL

Checking the exception level filters for a PMC is a minor annoyance to
open code. Add helpers to check if an event counts at EL0 and EL1, which
will prove useful in a subsequent change.

Reviewed-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20241025182354.3364124-15-oliver.upton@linux.dev
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>

diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c
index 0d669fb84485665b4f93abeb2d73384432cfa752..03cd1ad7a55a1d278f238d1c8e44bfde2fb5f673 100644 (file)
--- a/arch/arm64/kvm/pmu-emul.c
+++ b/arch/arm64/kvm/pmu-emul.c
@@ -111,6 +111,11 @@ static u32 counter_index_to_evtreg(u64 idx)
        return (idx == ARMV8_PMU_CYCLE_IDX) ? PMCCFILTR_EL0 : PMEVTYPER0_EL0 + idx;
 }
 
+static u64 kvm_pmc_read_evtreg(const struct kvm_pmc *pmc)
+{
+       return __vcpu_sys_reg(kvm_pmc_to_vcpu(pmc), counter_index_to_evtreg(pmc->idx));
+}
+
 static u64 kvm_pmu_get_pmc_value(struct kvm_pmc *pmc)
 {
        struct kvm_vcpu *vcpu = kvm_pmc_to_vcpu(pmc);
@@ -619,6 +624,24 @@ static bool kvm_pmu_counter_is_enabled(struct kvm_pmc *pmc)
               (__vcpu_sys_reg(vcpu, PMCNTENSET_EL0) & BIT(pmc->idx));
 }
 
+static bool kvm_pmc_counts_at_el0(struct kvm_pmc *pmc)
+{
+       u64 evtreg = kvm_pmc_read_evtreg(pmc);
+       bool nsu = evtreg & ARMV8_PMU_EXCLUDE_NS_EL0;
+       bool u = evtreg & ARMV8_PMU_EXCLUDE_EL0;
+
+       return u == nsu;
+}
+
+static bool kvm_pmc_counts_at_el1(struct kvm_pmc *pmc)
+{
+       u64 evtreg = kvm_pmc_read_evtreg(pmc);
+       bool nsk = evtreg & ARMV8_PMU_EXCLUDE_NS_EL1;
+       bool p = evtreg & ARMV8_PMU_EXCLUDE_EL1;
+
+       return p == nsk;
+}
+
 /**
  * kvm_pmu_create_perf_event - create a perf event for a counter
  * @pmc: Counter context
@@ -629,17 +652,15 @@ static void kvm_pmu_create_perf_event(struct kvm_pmc *pmc)
        struct arm_pmu *arm_pmu = vcpu->kvm->arch.arm_pmu;
        struct perf_event *event;
        struct perf_event_attr attr;
-       u64 eventsel, reg, data;
-       bool p, u, nsk, nsu;
+       u64 eventsel, evtreg;
 
-       reg = counter_index_to_evtreg(pmc->idx);
-       data = __vcpu_sys_reg(vcpu, reg);
+       evtreg = kvm_pmc_read_evtreg(pmc);
 
        kvm_pmu_stop_counter(pmc);
        if (pmc->idx == ARMV8_PMU_CYCLE_IDX)
                eventsel = ARMV8_PMUV3_PERFCTR_CPU_CYCLES;
        else
-               eventsel = data & kvm_pmu_event_mask(vcpu->kvm);
+               eventsel = evtreg & kvm_pmu_event_mask(vcpu->kvm);
 
        /*
         * Neither SW increment nor chained events need to be backed
@@ -657,18 +678,13 @@ static void kvm_pmu_create_perf_event(struct kvm_pmc *pmc)
            !test_bit(eventsel, vcpu->kvm->arch.pmu_filter))
                return;
 
-       p = data & ARMV8_PMU_EXCLUDE_EL1;
-       u = data & ARMV8_PMU_EXCLUDE_EL0;
-       nsk = data & ARMV8_PMU_EXCLUDE_NS_EL1;
-       nsu = data & ARMV8_PMU_EXCLUDE_NS_EL0;
-
        memset(&attr, 0, sizeof(struct perf_event_attr));
        attr.type = arm_pmu->pmu.type;
        attr.size = sizeof(attr);
        attr.pinned = 1;
        attr.disabled = !kvm_pmu_counter_is_enabled(pmc);
-       attr.exclude_user = (u != nsu);
-       attr.exclude_kernel = (p != nsk);
+       attr.exclude_user = !kvm_pmc_counts_at_el0(pmc);
+       attr.exclude_kernel = !kvm_pmc_counts_at_el1(pmc);
        attr.exclude_hv = 1; /* Don't count EL2 events */
        attr.exclude_host = 1; /* Don't count host events */
        attr.config = eventsel;