platform/x86: intel_pmc_ipc: Add read64 API

Add intel_pmc_gcr_read64() API for reading from 64-bit GCR registers.
This API will be called from intel_telemetry. Update description of
intel_pmc_gcr_read().

Signed-off-by: Souvik Kumar Chakravarty <souvik.k.chakravarty@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

diff --git a/arch/x86/include/asm/intel_pmc_ipc.h b/arch/x86/include/asm/intel_pmc_ipc.h
index 528ed4be43939b6afce28e7ea3429315ca033a73..9e7adcdbe031dfc6a30f2e4f47cd125d54418e74 100644 (file)
--- a/arch/x86/include/asm/intel_pmc_ipc.h
+++ b/arch/x86/include/asm/intel_pmc_ipc.h
@@ -38,6 +38,7 @@ int intel_pmc_ipc_command(u32 cmd, u32 sub, u8 *in, u32 inlen,
                u32 *out, u32 outlen);
 int intel_pmc_s0ix_counter_read(u64 *data);
 int intel_pmc_gcr_read(u32 offset, u32 *data);
+int intel_pmc_gcr_read64(u32 offset, u64 *data);
 int intel_pmc_gcr_write(u32 offset, u32 data);
 int intel_pmc_gcr_update(u32 offset, u32 mask, u32 val);
 
@@ -70,6 +71,11 @@ static inline int intel_pmc_gcr_read(u32 offset, u32 *data)
        return -EINVAL;
 }
 
+static inline int intel_pmc_gcr_read64(u32 offset, u64 *data)
+{
+       return -EINVAL;
+}
+
 static inline int intel_pmc_gcr_write(u32 offset, u32 data)
 {
        return -EINVAL;

diff --git a/drivers/platform/x86/intel_pmc_ipc.c b/drivers/platform/x86/intel_pmc_ipc.c
index e03fa31446ca83b107c220e438db53db38c44e80..e7edc8c6393674dfdcfcf53cccb80da50fd255f2 100644 (file)
--- a/drivers/platform/x86/intel_pmc_ipc.c
+++ b/drivers/platform/x86/intel_pmc_ipc.c
@@ -215,11 +215,11 @@ static inline int is_gcr_valid(u32 offset)
 }
 
 /**
- * intel_pmc_gcr_read() - Read PMC GCR register
+ * intel_pmc_gcr_read() - Read a 32-bit PMC GCR register
  * @offset:    offset of GCR register from GCR address base
  * @data:      data pointer for storing the register output
  *
- * Reads the PMC GCR register of given offset.
+ * Reads the 32-bit PMC GCR register at given offset.
  *
  * Return:     negative value on error or 0 on success.
  */
@@ -243,6 +243,35 @@ int intel_pmc_gcr_read(u32 offset, u32 *data)
 }
 EXPORT_SYMBOL_GPL(intel_pmc_gcr_read);
 
+/**
+ * intel_pmc_gcr_read64() - Read a 64-bit PMC GCR register
+ * @offset:    offset of GCR register from GCR address base
+ * @data:      data pointer for storing the register output
+ *
+ * Reads the 64-bit PMC GCR register at given offset.
+ *
+ * Return:     negative value on error or 0 on success.
+ */
+int intel_pmc_gcr_read64(u32 offset, u64 *data)
+{
+       int ret;
+
+       spin_lock(&ipcdev.gcr_lock);
+
+       ret = is_gcr_valid(offset);
+       if (ret < 0) {
+               spin_unlock(&ipcdev.gcr_lock);
+               return ret;
+       }
+
+       *data = readq(ipcdev.gcr_mem_base + offset);
+
+       spin_unlock(&ipcdev.gcr_lock);
+
+       return 0;
+}
+EXPORT_SYMBOL_GPL(intel_pmc_gcr_read64);
+
 /**
  * intel_pmc_gcr_write() - Write PMC GCR register
  * @offset:    offset of GCR register from GCR address base