drm/i915/gvt: remove the unused sreg

code cleanup. sreg is not used now. remove it for code cleanness.

v3: remove unnecessary array_size in vreg's memory allocation (min he)
v2: do not allocate memory for sreg. (min he)

Reviewed-by: He, Min <min.he@intel.com>
Signed-off-by: Yan Zhao <yan.y.zhao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h
index db82a420efcce7bc78793c13060ef7d7d916b2a2..05e9c2dd618399fbbe7284eb0c227ca378ed2b99 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/gvt.h
+++ b/drivers/gpu/drm/i915/gvt/gvt.h
@@ -94,7 +94,6 @@ struct intel_vgpu_fence {
 
 struct intel_vgpu_mmio {
        void *vreg;
-       void *sreg;
 };
 
 #define INTEL_GVT_MAX_BAR_NUM 4
@@ -447,10 +446,6 @@ void intel_vgpu_write_fence(struct intel_vgpu *vgpu,
        (*(u64 *)(vgpu->mmio.vreg + i915_mmio_reg_offset(reg)))
 #define vgpu_vreg64(vgpu, offset) \
        (*(u64 *)(vgpu->mmio.vreg + (offset)))
-#define vgpu_sreg_t(vgpu, reg) \
-       (*(u32 *)(vgpu->mmio.sreg + i915_mmio_reg_offset(reg)))
-#define vgpu_sreg(vgpu, offset) \
-       (*(u32 *)(vgpu->mmio.sreg + (offset)))
 
 #define for_each_active_vgpu(gvt, vgpu, id) \
        idr_for_each_entry((&(gvt)->vgpu_idr), (vgpu), (id)) \

diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index 65ee8ed0e2061454a8ab62e90c236766bdad8b15..6f9763fbf4f565241529fb6a29e151da86c38612 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -3488,12 +3488,11 @@ int intel_vgpu_mmio_reg_rw(struct intel_vgpu *vgpu, unsigned int offset,
                return mmio_info->read(vgpu, offset, pdata, bytes);
        else {
                u64 ro_mask = mmio_info->ro_mask;
-               u32 old_vreg = 0, old_sreg = 0;
+               u32 old_vreg = 0;
                u64 data = 0;
 
                if (intel_gvt_mmio_has_mode_mask(gvt, mmio_info->offset)) {
                        old_vreg = vgpu_vreg(vgpu, offset);
-                       old_sreg = vgpu_sreg(vgpu, offset);
                }
 
                if (likely(!ro_mask))
@@ -3515,8 +3514,6 @@ int intel_vgpu_mmio_reg_rw(struct intel_vgpu *vgpu, unsigned int offset,
 
                        vgpu_vreg(vgpu, offset) = (old_vreg & ~mask)
                                        | (vgpu_vreg(vgpu, offset) & mask);
-                       vgpu_sreg(vgpu, offset) = (old_sreg & ~mask)
-                                       | (vgpu_sreg(vgpu, offset) & mask);
                }
        }
 

diff --git a/drivers/gpu/drm/i915/gvt/mmio.c b/drivers/gpu/drm/i915/gvt/mmio.c
index ed4df2f6d60b6fe233b912917499505d52642d0e..a55178884d67ad927a747f7470aa91fd6c1ca560 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/mmio.c
+++ b/drivers/gpu/drm/i915/gvt/mmio.c
@@ -239,7 +239,6 @@ void intel_vgpu_reset_mmio(struct intel_vgpu *vgpu, bool dmlr)
 
        if (dmlr) {
                memcpy(vgpu->mmio.vreg, mmio, info->mmio_size);
-               memcpy(vgpu->mmio.sreg, mmio, info->mmio_size);
 
                vgpu_vreg_t(vgpu, GEN6_GT_THREAD_STATUS_REG) = 0;
 
@@ -280,7 +279,6 @@ void intel_vgpu_reset_mmio(struct intel_vgpu *vgpu, bool dmlr)
                 * touched
                 */
                memcpy(vgpu->mmio.vreg, mmio, GVT_GEN8_MMIO_RESET_OFFSET);
-               memcpy(vgpu->mmio.sreg, mmio, GVT_GEN8_MMIO_RESET_OFFSET);
        }
 
 }
@@ -296,12 +294,10 @@ int intel_vgpu_init_mmio(struct intel_vgpu *vgpu)
 {
        const struct intel_gvt_device_info *info = &vgpu->gvt->device_info;
 
-       vgpu->mmio.vreg = vzalloc(array_size(info->mmio_size, 2));
+       vgpu->mmio.vreg = vzalloc(info->mmio_size);
        if (!vgpu->mmio.vreg)
                return -ENOMEM;
 
-       vgpu->mmio.sreg = vgpu->mmio.vreg + info->mmio_size;
-
        intel_vgpu_reset_mmio(vgpu, true);
 
        return 0;
@@ -315,5 +311,5 @@ int intel_vgpu_init_mmio(struct intel_vgpu *vgpu)
 void intel_vgpu_clean_mmio(struct intel_vgpu *vgpu)
 {
        vfree(vgpu->mmio.vreg);
-       vgpu->mmio.vreg = vgpu->mmio.sreg = NULL;
+       vgpu->mmio.vreg = NULL;
 }