fsl/fman: don't touch liodn base regs reserved on non-PAMU SoCs

The liodn base registers are specific to PAMU based NXP systems and are
reserved on SMMU based ones. Don't access them unless PAMU is compiled in.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/freescale/fman/fman.c b/drivers/net/ethernet/freescale/fman/fman.c
index 210749bf1eac11537376244a7bd7b68740a5bba8..934111def0becb5664e119b4d32bb672496c66e7 100644 (file)
--- a/drivers/net/ethernet/freescale/fman/fman.c
+++ b/drivers/net/ethernet/freescale/fman/fman.c
@@ -634,6 +634,9 @@ static void set_port_liodn(struct fman *fman, u8 port_id,
 {
        u32 tmp;
 
+       iowrite32be(liodn_ofst, &fman->bmi_regs->fmbm_spliodn[port_id - 1]);
+       if (!IS_ENABLED(CONFIG_FSL_PAMU))
+               return;
        /* set LIODN base for this port */
        tmp = ioread32be(&fman->dma_regs->fmdmplr[port_id / 2]);
        if (port_id % 2) {
@@ -644,7 +647,6 @@ static void set_port_liodn(struct fman *fman, u8 port_id,
                tmp |= liodn_base << DMA_LIODN_SHIFT;
        }
        iowrite32be(tmp, &fman->dma_regs->fmdmplr[port_id / 2]);
-       iowrite32be(liodn_ofst, &fman->bmi_regs->fmbm_spliodn[port_id - 1]);
 }
 
 static void enable_rams_ecc(struct fman_fpm_regs __iomem *fpm_rg)
@@ -1942,6 +1944,8 @@ static int fman_init(struct fman *fman)
 
                fman->liodn_offset[i] =
                        ioread32be(&fman->bmi_regs->fmbm_spliodn[i - 1]);
+               if (!IS_ENABLED(CONFIG_FSL_PAMU))
+                       continue;
                liodn_base = ioread32be(&fman->dma_regs->fmdmplr[i / 2]);
                if (i % 2) {
                        /* FMDM_PLR LSB holds LIODN base for odd ports */