d40c->dma_cfg = dma40_memcpy_conf_log;
                d40c->dma_cfg.dev_type = dma40_memcpy_channels[d40c->chan.chan_id];
 
+               d40_log_cfg(&d40c->dma_cfg,
+                           &d40c->log_def.lcsp1, &d40c->log_def.lcsp3);
+
        } else if (dma_has_cap(DMA_MEMCPY, cap) &&
                   dma_has_cap(DMA_SLAVE, cap)) {
                d40c->dma_cfg = dma40_memcpy_conf_phy;
        d40_set_prio_realtime(d40c);
 
        if (chan_is_logical(d40c)) {
-               d40_log_cfg(&d40c->dma_cfg,
-                           &d40c->log_def.lcsp1, &d40c->log_def.lcsp3);
-
                if (d40c->dma_cfg.dir == STEDMA40_PERIPH_TO_MEM)
                        d40c->lcpa = d40c->base->lcpa_base +
                                d40c->dma_cfg.dev_type * D40_LCPA_CHAN_SIZE;