case 4:
                ret = loongarch_eiointc_readl(vcpu, eiointc, addr, val);
                break;
-       case 8:
+       default:
                ret = loongarch_eiointc_readq(vcpu, eiointc, addr, val);
                break;
-       default:
-               WARN_ONCE(1, "%s: Abnormal address access: addr 0x%llx, size %d\n",
-                                               __func__, addr, len);
        }
        spin_unlock_irqrestore(&eiointc->lock, flags);
 
        case 4:
                ret = loongarch_eiointc_writel(vcpu, eiointc, addr, val);
                break;
-       case 8:
+       default:
                ret = loongarch_eiointc_writeq(vcpu, eiointc, addr, val);
                break;
-       default:
-               WARN_ONCE(1, "%s: Abnormal address access: addr 0x%llx, size %d\n",
-                                               __func__, addr, len);
        }
        spin_unlock_irqrestore(&eiointc->lock, flags);