Modifications for 1.1.3:
======================================================================
+* Patch by Brad Kemp, 27 Dec 2001
+ Move board dependend config stuff from cpu/mpc8260/ether_fcc.c
+ to board config files; cleanup mess of CONFIG_ETHER_ON_* and
+ CONFIG_ETHER_USE_* definitions.
+
* Patch by Stefan Roese, 21 Dec 2001
- DU405 board added
- Minor changes to some ESD boards
#include <mpc8260.h>
#include <net.h>
#include <command.h>
-/*#include "mii_phy.h"*/
+#include <config.h>
#if defined(CONFIG_ETHER_ON_FCC) && (CONFIG_COMMANDS & CFG_CMD_NET)
-/*---------------------------------------------------------------------*/
/*---------------------------------------------------------------------*/
#if (CONFIG_ETHER_INDEX == 1)
#define CPM_CR_ENET_SBLOCK CPM_CR_FCC1_SBLOCK
#define CPM_CR_ENET_PAGE CPM_CR_FCC1_PAGE
-/******* HYMOD *******************************************************/
-#if defined(CONFIG_HYMOD)
-/*
- * Attention: this is board-specific
- * - Rx-CLK is CLK10
- * - Tx-CLK is CLK11
- * - RAM for BD/Buffers is on the 60x Bus (see 28-13)
- * - Enable Full Duplex in FSMR
- */
-#define CMXFCR_MASK (CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK)
-#define CMXFCR_VALUE (CMXFCR_RF1CS_CLK10|CMXFCR_TF1CS_CLK11)
-#define CPMFCR_RAMTYPE 0
-#define FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
-#endif /* CONFIG_HYMOD */
-/******* PM826 *******************************************************/
-#if defined(CONFIG_PM826)
-/*
- * Attention: this is board-specific
- * - Rx-CLK is CLK11
- * - Tx-CLK is CLK10
- * - RAM for BD/Buffers is on the 60x Bus (see 28-13)
- * - Enable Full Duplex in FSMR
- */
-#define CMXFCR_MASK (CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK)
-#define CMXFCR_VALUE (CMXFCR_RF1CS_CLK11|CMXFCR_TF1CS_CLK10)
-#define CPMFCR_RAMTYPE 0
-#define FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
-#endif /* CONFIG_PM826 */
-/******* RPXSUPER ****************************************************/
-#if defined(CONFIG_RPXSUPER)
-#error "on RPX Super ethernet must be FCC3"
-#endif
-
-/*---------------------------------------------------------------------*/
/*---------------------------------------------------------------------*/
#elif (CONFIG_ETHER_INDEX == 2)
#define PROFF_ENET PROFF_FCC2
#define CPM_CR_ENET_SBLOCK CPM_CR_FCC2_SBLOCK
#define CPM_CR_ENET_PAGE CPM_CR_FCC2_PAGE
-/******* HYMOD *******************************************************/
-#if defined(CONFIG_HYMOD)
-/*
- * Attention: this is board-specific
- * - Rx-CLK is CLK13
- * - Tx-CLK is CLK14
- * - RAM for BD/Buffers is on the 60x Bus (see 28-13)
- * - Enable Full Duplex in FSMR
- */
-#define CMXFCR_MASK (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
-#define CMXFCR_VALUE (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
-#define CPMFCR_RAMTYPE 0
-#define FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
-#endif /* CONFIG_HYMOD */
-/******* MPC8260ADS **************************************************/
-#if defined(CONFIG_MPC8260ADS)
-/*
- * Attention: this is board-specific
- * - Rx-CLK is CLK13
- * - Tx-CLK is CLK14
- * - Select bus for bd/buffers (see 28-13)
- * - Half duplex
- */
-#define CMXFCR_MASK (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
-#define CMXFCR_VALUE (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
-#define CPMFCR_RAMTYPE 0
-#define FCC_PSMR 0
-#endif /* CONFIG_MPC8260ADS */
-/******* RSD_PROTO ***************************************************/
-#if defined(CONFIG_RSD_PROTO)
-/*
- * Attention: this is board-specific
- * - Rx-CLK is CLK13
- * - Tx-CLK is CLK14
- * - Select bus for bd/buffers (see 28-13)
- * - Enable Full Duplex in FSMR
- */
-#define CMXFCR_MASK (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
-#define CMXFCR_VALUE (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
-#define CPMFCR_RAMTYPE (0)
-#define FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB)
-#endif /* CONFIG_RSD_PROTO */
-/******* RPXSUPER ****************************************************/
-#if defined(CONFIG_RPXSUPER)
-#error "on RPX Super ethernet must be FCC3"
-#endif /* CONFIG_RPXSUPER */
-/******* SBC8260 *****************************************************/
-#if defined(CONFIG_SBC8260)
-/*
- * Attention: this is board-specific
- * - Rx-CLK is CLK13
- * - Tx-CLK is CLK14
- * - Select bus for bd/buffers (see 28-13)
- * - Enable Full Duplex in FSMR
- */
-#define CMXFCR_MASK (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
-#define CMXFCR_VALUE (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
-#define CPMFCR_RAMTYPE 0
-#define FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB)
-#endif /* CONFIG_SBC8260 */
-/******* GW8260 ******************************************************/
-#if defined(CONFIG_GW8260)
-/*
- * Attention: this is board-specific
- * - Rx-CLK is CLK13
- * - Tx-CLK is CLK14
- * - Select bus for bd/buffers (see 28-13)
- * - Enable Full Duplex in FSMR
- */
-#define CMXFCR_MASK (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
-#define CMXFCR_VALUE (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
-#define CPMFCR_RAMTYPE 0
-#define FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB)
-#endif /* CONFIG_GW8260 */
-/******* TQM8260 *****************************************************/
-#if defined(CONFIG_TQM8260)
-/*
- * Attention: this is board-specific
- * - Rx-CLK is CLK13
- * - Tx-CLK is CLK14
- * - RAM for BD/Buffers is on the 60x Bus (see 28-13)
- * - Enable Full Duplex in FSMR
- */
-#define CMXFCR_MASK (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
-#define CMXFCR_VALUE (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
-#define CPMFCR_RAMTYPE 0
-#define FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
-#endif /* CONFIG_TQM8260 */
-/*---------------------------------------------------------------------*/
/*---------------------------------------------------------------------*/
#elif (CONFIG_ETHER_INDEX == 3)
#define PROFF_ENET PROFF_FCC3
#define CPM_CR_ENET_SBLOCK CPM_CR_FCC3_SBLOCK
#define CPM_CR_ENET_PAGE CPM_CR_FCC3_PAGE
-/******* HYMOD *******************************************************/
-#if defined(CONFIG_HYMOD)
-/*
- * Attention: this is board-specific
- * - Rx-CLK is CLK15
- * - Tx-CLK is CLK16
- * - RAM for BD/Buffers is on the 60x Bus (see 28-13)
- * - Enable Full Duplex in FSMR
- */
-#define CMXFCR_MASK (CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK)
-#define CMXFCR_VALUE (CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16)
-#define CPMFCR_RAMTYPE 0
-#define FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
-#endif /* CONFIG_HYMOD */
-/******* RPXSUPER ****************************************************/
-#if defined(CONFIG_RPXSUPER)
-/*
- * Attention: this is board-specific
- * - Rx-CLK is CLK15
- * - Tx-CLK is CLK16
- * - RAM for BD/Buffers is on the 60x Bus (see 28-13)
- * - Enable Half Duplex in FSMR
- */
-#define CMXFCR_MASK (CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK)
-#define CMXFCR_VALUE (CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16)
-#define CPMFCR_RAMTYPE 0
-//#define FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
-#define FCC_PSMR 0
-#endif /* CONFIG_RPXSUPER */
-/******* GW8260 ******************************************************/
-#if defined(CONFIG_GW8260)
-/*
- * Attention: this is board-specific
- * - Rx-CLK is CLK15
- * - Tx-CLK is CLK16
- * - Select bus for bd/buffers (see 28-13)
- * - Enable Full Duplex in FSMR
- */
-#define CMXFCR_MASK (CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK)
-#define CMXFCR_VALUE (CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16)
-#define CPMFCR_RAMTYPE 0
-#define FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB)
-#endif /* CONFIG_GW8260 */
/*---------------------------------------------------------------------*/
#else
/* 28.9 - (3): connect FCC's tx and rx clocks */
immr->im_cpmux.cmx_uar = 0;
- immr->im_cpmux.cmx_fcr = (immr->im_cpmux.cmx_fcr&~CMXFCR_MASK)|CMXFCR_VALUE;
+ immr->im_cpmux.cmx_fcr = (immr->im_cpmux.cmx_fcr & ~CFG_CMXFCR_MASK) |
+ CFG_CMXFCR_VALUE;
/* 28.9 - (4): GFMR: disable tx/rx, CCITT CRC, Mode Ethernet */
immr->im_fcc[CONFIG_ETHER_INDEX-1].fcc_gfmr =
FCC_GFMR_MODE_ENET | FCC_GFMR_TCRC_32;
/* 28.9 - (5): FPSMR: enable full duplex, select CCITT CRC for Ethernet */
- immr->im_fcc[CONFIG_ETHER_INDEX-1].fcc_fpsmr = FCC_PSMR | FCC_PSMR_ENCRC;
+ immr->im_fcc[CONFIG_ETHER_INDEX-1].fcc_fpsmr = CFG_FCC_PSMR | FCC_PSMR_ENCRC;
/* 28.9 - (6): FDSR: Ethernet Syn */
immr->im_fcc[CONFIG_ETHER_INDEX-1].fcc_fdsr = 0xD555;
*/
pram_ptr->fen_genfcc.fcc_mrblr = PKT_MAXBLR_SIZE;
pram_ptr->fen_genfcc.fcc_rstate = (CPMFCR_GBL | CPMFCR_EB |
- CPMFCR_RAMTYPE) << 24;
+ CFG_CPMFCR_RAMTYPE) << 24;
pram_ptr->fen_genfcc.fcc_rbase = (unsigned int)(&rtx.rxbd[rxIdx]);
pram_ptr->fen_genfcc.fcc_tstate = (CPMFCR_GBL | CPMFCR_EB |
- CPMFCR_RAMTYPE) << 24;
+ CFG_CPMFCR_RAMTYPE) << 24;
pram_ptr->fen_genfcc.fcc_tbase = (unsigned int)(&rtx.txbd[txIdx]);
/* protocol-specific area */
pram_ptr->fen_rfthr = 1;
pram_ptr->fen_rfcnt = 1;
#if 0
- printf("pram_ptr->fen_genfcc.fcc_rbase %08lx\n", pram_ptr->fen_genfcc.fcc_rbase);
- printf("pram_ptr->fen_genfcc.fcc_tbase %08lx\n", pram_ptr->fen_genfcc.fcc_tbase);
+ printf("pram_ptr->fen_genfcc.fcc_rbase %08lx\n",
+ pram_ptr->fen_genfcc.fcc_rbase);
+ printf("pram_ptr->fen_genfcc.fcc_tbase %08lx\n",
+ pram_ptr->fen_genfcc.fcc_tbase);
#endif
/* 28.9 - (8): clear out events in FCCE */
/* write GFMR: disable tx/rx */
immr->im_fcc[CONFIG_ETHER_INDEX-1].fcc_gfmr &=
- ~(FCC_GFMR_ENT | FCC_GFMR_ENR);
+ ~(FCC_GFMR_ENT | FCC_GFMR_ENR);
}
#endif /* CONFIG_ETHER_ON_FCC && CFG_CMD_NET */
#include <mpc8260.h>
#include <net.h>
#include <command.h>
+#include <config.h>
#if defined(CONFIG_ETHER_ON_SCC) && (CONFIG_COMMANDS & CFG_CMD_NET)
# define CMXSCR_MASK (CMXSCR_SC1 |\
CMXSCR_RS1CS_MSK |\
CMXSCR_TS1CS_MSK)
-# if defined(CONFIG_SBC8260)
-/*
- * Attention: This is board specific
- * - RX clk is CLK11
- * - TX clk is CLK12
- */
-# define CMXSCR_VALUE (CMXSCR_RS1CS_CLK11 |\
- CMXSCR_TS1CS_CLK12)
-# endif
-
-# if defined(CONFIG_TQM8260)
-/*
- * Attention: This is board specific
- * - RX clk is CLK11
- * - TX clk is CLK12
- */
-# define CMXSCR_VALUE (CMXSCR_RS1CS_CLK11 |\
- CMXSCR_TS1CS_CLK12)
-# endif
#elif (CONFIG_ETHER_INDEX == 2)
# define PROFF_ENET PROFF_SCC2
/* 24.21 - (4,5): connect SCC's tx and rx clocks, use NMSI for SCC */
immr->im_cpmux.cmx_uar = 0;
immr->im_cpmux.cmx_scr = ( (immr->im_cpmux.cmx_scr & ~CMXSCR_MASK) |
- CMXSCR_VALUE);
+ CFG_CMXSCR_VALUE);
/* 24.21 (6) write RBASE and TBASE to parameter RAM */
#undef CONFIG_ETHER_NONE /* define if ether on something else */
#define CONFIG_ETHER_INDEX 2 /* which channel for ether */
+#if (CONFIG_ETHER_INDEX == 2)
+
+/*
+ * - Rx-CLK is CLK13
+ * - Tx-CLK is CLK14
+ * - Select bus for bd/buffers (see 28-13)
+ * - Half duplex
+ */
+# define CFG_CMXFCR_MASK (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
+# define CFG_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
+# define CFG_CPMFCR_RAMTYPE 0
+# define CFG_FCC_PSMR 0
+
+#endif /* CONFIG_ETHER_INDEX */
+
/* other options */
#define CONFIG_I2C 1 /* To enable I2C support */
#undef CONFIG_ETHER_NONE /* define if ether on something else */
#define CONFIG_ETHER_INDEX 1 /* which SCC/FCC channel for ethernet */
+#if (CONFIG_ETHER_INDEX == 1)
+/*
+ * - Rx-CLK is CLK11
+ * - Tx-CLK is CLK10
+ * - RAM for BD/Buffers is on the 60x Bus (see 28-13)
+ * - Enable Full Duplex in FSMR
+ */
+# define CFG_CMXFCR_MASK (CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK)
+# define CFG_CMXFCR_VALUE (CMXFCR_RF1CS_CLK11|CMXFCR_TF1CS_CLK10)
+# define CFG_CPMFCR_RAMTYPE 0
+# define CFG_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
+
+#endif /* CONFIG_ETHER_INDEX */
+
/* system clock rate (CLKIN) - equal to the 60x and local bus speed */
#define CONFIG_8260_CLKIN 64000000 /* in Hz */
#undef CONFIG_ETHER_NONE /* define if ethernet on neither */
#define CONFIG_ETHER_INDEX 3 /* which SCC/FCC channel for ethernet */
+#if ( CONFIG_ETHER_INDEX == 3 )
+
+/*
+ * - Rx-CLK is CLK15
+ * - Tx-CLK is CLK16
+ * - RAM for BD/Buffers is on the 60x Bus (see 28-13)
+ * - Enable Half Duplex in FSMR
+ */
+# define CFG_CMXFCR_MASK (CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK)
+# define CFG_CMXFCR_VALUE (CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16)
+# define CFG_CPMFCR_RAMTYPE 0
+/*#define CFG_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB) */
+# define CFG_FCC_PSMR 0
+
+#else /* CONFIG_ETHER_INDEX */
+# error "on RPX Super ethernet must be FCC3"
+#endif /* CONFIG_ETHER_INDEX */
+
#define CONFIG_I2C 1
/* Define this to reserve an entire FLASH sector (256 KB) for
#undef CONFIG_ETHER_NONE /* define if ether on something else */
#define CONFIG_ETHER_INDEX 2 /* which SCC/FCC channel for ethernet */
+#if defined(CONFIG_ETHER_ON_SCC) && (CONFIG_ETHER_INDEX == 1)
+
+/*
+ * - RX clk is CLK11
+ * - TX clk is CLK12
+ */
+# define CFG_CMXSCR_VALUE (CMXSCR_RS1CS_CLK11 | CMXSCR_TS1CS_CLK12)
+
+#elif defined(CONFIG_ETHER_ON_FCC) && (CONFIG_ETHER_INDEX == 2)
+
+/*
+ * - Rx-CLK is CLK13
+ * - Tx-CLK is CLK14
+ * - RAM for BD/Buffers is on the 60x Bus (see 28-13)
+ * - Enable Full Duplex in FSMR
+ */
+# define CFG_CMXFCR_MASK (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
+# define CFG_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
+# define CFG_CPMFCR_RAMTYPE 0
+# define CFG_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
+
+#endif /* CONFIG_ETHER_ON_FCC, CONFIG_ETHER_INDEX */
+
+
/* system clock rate (CLKIN) - equal to the 60x and local bus speed */
#define CONFIG_8260_CLKIN 66666666 /* in Hz */
* from CONFIG_COMMANDS to remove support for networking.
*/
-#undef CONFIG_ETHER_USE_SCC
-#define CONFIG_ETHER_USE_FCC
-
-#ifdef CONFIG_ETHER_USE_SCC
-#define CONFIG_ETHER_ON_SCC 1 /* define if ethernet on SCC */
-#undef CONFIG_ETHER_ON_FCC /* define if ethernet on FCC */
+#undef CONFIG_ETHER_ON_SCC
+#define CONFIG_ETHER_ON_FCC
#undef CONFIG_ETHER_NONE /* define if ethernet on neither */
+
+#ifdef CONFIG_ETHER_ON_SCC
#define CONFIG_ETHER_INDEX 1 /* which SCC/FCC channel for ethernet */
-#endif /* CONFIG_ETHER_USE_SCC1 */
+#endif /* CONFIG_ETHER_ON_SCC */
-#ifdef CONFIG_ETHER_USE_FCC
-#undef CONFIG_ETHER_ON_SCC /* define if ethernet on SCC */
-#define CONFIG_ETHER_ON_FCC /* define if ethernet on FCC */
-#undef CONFIG_ETHER_NONE /* define if ethernet on neither */
+#ifdef CONFIG_ETHER_ON_FCC
#define CONFIG_ETHER_INDEX 2 /* which SCC/FCC channel for ethernet */
#define CONFIG_MII /* MII PHY management */
#define CONFIG_BITBANGMII /* bit-bang MII PHY management */
else iop->pdat &= ~0x00200000
#define MIIDELAY udelay(1)
-#endif /* CONFIG_ETHER_USE_FCC */
+#endif /* CONFIG_ETHER_ON_FCC */
+
+#if defined(CONFIG_ETHER_ON_FCC) && (CONFIG_ETHER_INDEX == 2)
+
+/*
+ * - Rx-CLK is CLK13
+ * - Tx-CLK is CLK14
+ * - Select bus for bd/buffers (see 28-13)
+ * - Enable Full Duplex in FSMR
+ */
+# define CFG_CMXFCR_MASK (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
+# define CFG_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
+# define CFG_CPMFCR_RAMTYPE 0
+# define CFG_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB)
+
+#elif defined(CONFIG_ETHER_ON_FCC) && (CONFIG_ETHER_INDEX == 3)
+
+/*
+ * - Rx-CLK is CLK15
+ * - Tx-CLK is CLK16
+ * - Select bus for bd/buffers (see 28-13)
+ * - Enable Full Duplex in FSMR
+ */
+# define CFG_CMXFCR_MASK (CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK)
+# define CFG_CMXFCR_VALUE (CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16)
+# define CFG_CPMFCR_RAMTYPE 0
+# define CFG_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB)
+
+#endif /* CONFIG_ETHER_ON_FCC, CONFIG_ETHER_INDEX */
/* Define this to reserve an entire FLASH sector (256 KB) for
* environment variables. Otherwise, the environment will be
#undef CONFIG_ETHER_NONE /* define if ether on something else */
#define CONFIG_ETHER_INDEX 1 /* which channel for ether */
+#if (CONFIG_ETHER_INDEX == 1)
+
+/*
+ * - Rx-CLK is CLK10
+ * - Tx-CLK is CLK11
+ * - RAM for BD/Buffers is on the 60x Bus (see 28-13)
+ * - Enable Full Duplex in FSMR
+ */
+# define CFG_CMXFCR_MASK (CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK)
+# define CFG_CMXFCR_VALUE (CMXFCR_RF1CS_CLK10|CMXFCR_TF1CS_CLK11)
+# define CFG_CPMFCR_RAMTYPE 0
+# define CFG_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
+
+#elif (CONFIG_ETHER_INDEX == 2)
+
+/*
+ * - Rx-CLK is CLK13
+ * - Tx-CLK is CLK14
+ * - RAM for BD/Buffers is on the 60x Bus (see 28-13)
+ * - Enable Full Duplex in FSMR
+ */
+# define CFG_CMXFCR_MASK (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
+# define CFG_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
+# define CFG_CPMFCR_RAMTYPE 0
+# define CFG_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
+
+#elif (CONFIG_ETHER_INDEX == 3)
+
+/*
+ * - Rx-CLK is CLK15
+ * - Tx-CLK is CLK16
+ * - RAM for BD/Buffers is on the 60x Bus (see 28-13)
+ * - Enable Full Duplex in FSMR
+ */
+# define CFG_CMXFCR_MASK (CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK)
+# define CFG_CMXFCR_VALUE (CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16)
+# define CFG_CPMFCR_RAMTYPE 0
+# define CFG_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
+
+#endif /* CONFIG_ETHER_INDEX */
+
+
/* other options */
#define CONFIG_I2C 1 /* To enable I2C support */
#undef CONFIG_ETHER_NONE /* define if ethernet on neither */
#define CONFIG_ETHER_INDEX 2 /* which SCC/FCC channel for ethernet */
+#if (CONFIG_ETHER_INDEX == 2)
+
+/*
+ * - Rx-CLK is CLK13
+ * - Tx-CLK is CLK14
+ * - Select bus for bd/buffers (see 28-13)
+ * - Enable Full Duplex in FSMR
+ */
+# define CFG_CMXFCR_MASK (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
+# define CFG_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
+# define CFG_CPMFCR_RAMTYPE (0)
+# define CFG_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB)
+
+#endif /* CONFIG_ETHER_INDEX */
+
+
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
* from CONFIG_COMMANDS to remove support for networking.
*/
-#undef CONFIG_ETHER_USE_SCC1
-#define CONFIG_ETHER_USE_FCC2
-
-#ifdef CONFIG_ETHER_USE_SCC1
-#define CONFIG_ETHER_ON_SCC 1 /* define if ethernet on SCC */
-#undef CONFIG_ETHER_ON_FCC /* define if ethernet on FCC */
+#undef CONFIG_ETHER_ON_SCC
+#define CONFIG_ETHER_ON_FCC
#undef CONFIG_ETHER_NONE /* define if ethernet on neither */
+
+#ifdef CONFIG_ETHER_ON_SCC
#define CONFIG_ETHER_INDEX 1 /* which SCC/FCC channel for ethernet */
-#endif /* CONFIG_ETHER_USE_SCC1 */
+#endif /* CONFIG_ETHER_ON_SCC */
-#ifdef CONFIG_ETHER_USE_FCC2
-#undef CONFIG_ETHER_ON_SCC /* define if ethernet on SCC */
-#define CONFIG_ETHER_ON_FCC /* define if ethernet on FCC */
-#undef CONFIG_ETHER_NONE /* define if ethernet on neither */
+#ifdef CONFIG_ETHER_ON_FCC
#define CONFIG_ETHER_INDEX 2 /* which SCC/FCC channel for ethernet */
#define CONFIG_MII /* MII PHY management */
#define CONFIG_BITBANGMII /* bit-bang MII PHY management */
else iop->pdat &= ~0x00200000
#define MIIDELAY udelay(1)
-#endif /* CONFIG_ETHER_USE_FCC2 */
+#endif /* CONFIG_ETHER_ON_FCC */
+
+#if defined(CONFIG_ETHER_ON_SCC) && (CONFIG_ETHER_INDEX == 1)
+
+/*
+ * - RX clk is CLK11
+ * - TX clk is CLK12
+ */
+# define CFG_CMXSCR_VALUE (CMXSCR_RS1CS_CLK11 | CMXSCR_TS1CS_CLK12)
+
+#elif defined(CONFIG_ETHER_ON_FCC) && (CONFIG_ETHER_INDEX == 2)
+
+/*
+ * - Rx-CLK is CLK13
+ * - Tx-CLK is CLK14
+ * - Select bus for bd/buffers (see 28-13)
+ * - Enable Full Duplex in FSMR
+ */
+# define CFG_CMXFCR_MASK (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
+# define CFG_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
+# define CFG_CPMFCR_RAMTYPE 0
+# define CFG_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB)
+
+#endif /* CONFIG_ETHER_ON_FCC, CONFIG_ETHER_INDEX */
+
/* Define this to reserve an entire FLASH sector (256 KB) for
* environment variables. Otherwise, the environment will be
#define CFG_PROMPT "=> "
/* What ppcboot subsytems do you want enabled? */
-#ifdef CONFIG_ETHER_USE_FCC2
+#ifdef CONFIG_ETHER_ON_FCC
# define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \
CFG_CMD_ELF | \
CFG_CMD_ASKENV | \
CFG_CMD_I2C | \
CFG_CMD_REGINFO | \
CFG_CMD_IMMAP )
-#endif /* CONFIG_ETHER_USE_FCC2 */
+#endif /* CONFIG_ETHER_ON_FCC */
/* Where do the internal registers live? */
#define CFG_IMMR 0xF0000000