#include <core/engine.h>
 #include <core/event.h>
 
+enum nvkm_devidx {
+       NVDEV_ENGINE_DEVICE,
+       NVDEV_SUBDEV_VBIOS,
+
+       /* All subdevs from DEVINIT to DEVINIT_LAST will be created before
+        * *any* of them are initialised.  This subdev category is used
+        * for any subdevs that the VBIOS init table parsing may call out
+        * to during POST.
+        */
+       NVDEV_SUBDEV_DEVINIT,
+       NVDEV_SUBDEV_IBUS,
+       NVDEV_SUBDEV_GPIO,
+       NVDEV_SUBDEV_I2C,
+       NVDEV_SUBDEV_DEVINIT_LAST = NVDEV_SUBDEV_I2C,
+
+       /* This grouping of subdevs are initialised right after they've
+        * been created, and are allowed to assume any subdevs in the
+        * list above them exist and have been initialised.
+        */
+       NVDEV_SUBDEV_FUSE,
+       NVDEV_SUBDEV_MXM,
+       NVDEV_SUBDEV_MC,
+       NVDEV_SUBDEV_BUS,
+       NVDEV_SUBDEV_TIMER,
+       NVDEV_SUBDEV_FB,
+       NVDEV_SUBDEV_LTC,
+       NVDEV_SUBDEV_INSTMEM,
+       NVDEV_SUBDEV_MMU,
+       NVDEV_SUBDEV_BAR,
+       NVDEV_SUBDEV_PMU,
+       NVDEV_SUBDEV_VOLT,
+       NVDEV_SUBDEV_THERM,
+       NVDEV_SUBDEV_CLK,
+
+       NVDEV_ENGINE_FIRST,
+       NVDEV_ENGINE_DMAOBJ = NVDEV_ENGINE_FIRST,
+       NVDEV_ENGINE_IFB,
+       NVDEV_ENGINE_FIFO,
+       NVDEV_ENGINE_SW,
+       NVDEV_ENGINE_GR,
+       NVDEV_ENGINE_MPEG,
+       NVDEV_ENGINE_ME,
+       NVDEV_ENGINE_VP,
+       NVDEV_ENGINE_CIPHER,
+       NVDEV_ENGINE_BSP,
+       NVDEV_ENGINE_MSPPP,
+       NVDEV_ENGINE_CE0,
+       NVDEV_ENGINE_CE1,
+       NVDEV_ENGINE_CE2,
+       NVDEV_ENGINE_VIC,
+       NVDEV_ENGINE_MSENC,
+       NVDEV_ENGINE_DISP,
+       NVDEV_ENGINE_PM,
+       NVDEV_ENGINE_MSVLD,
+       NVDEV_ENGINE_SEC,
+       NVDEV_ENGINE_MSPDEC,
+
+       NVDEV_SUBDEV_NR,
+};
+
 struct nvkm_device {
        struct nvkm_engine engine;
        struct list_head head;
 
+++ /dev/null
-#ifndef __NVKM_DEVIDX_H__
-#define __NVKM_DEVIDX_H__
-enum nvkm_devidx {
-       NVDEV_ENGINE_DEVICE,
-       NVDEV_SUBDEV_VBIOS,
-
-       /* All subdevs from DEVINIT to DEVINIT_LAST will be created before
-        * *any* of them are initialised.  This subdev category is used
-        * for any subdevs that the VBIOS init table parsing may call out
-        * to during POST.
-        */
-       NVDEV_SUBDEV_DEVINIT,
-       NVDEV_SUBDEV_IBUS,
-       NVDEV_SUBDEV_GPIO,
-       NVDEV_SUBDEV_I2C,
-       NVDEV_SUBDEV_DEVINIT_LAST = NVDEV_SUBDEV_I2C,
-
-       /* This grouping of subdevs are initialised right after they've
-        * been created, and are allowed to assume any subdevs in the
-        * list above them exist and have been initialised.
-        */
-       NVDEV_SUBDEV_FUSE,
-       NVDEV_SUBDEV_MXM,
-       NVDEV_SUBDEV_MC,
-       NVDEV_SUBDEV_BUS,
-       NVDEV_SUBDEV_TIMER,
-       NVDEV_SUBDEV_FB,
-       NVDEV_SUBDEV_LTC,
-       NVDEV_SUBDEV_INSTMEM,
-       NVDEV_SUBDEV_MMU,
-       NVDEV_SUBDEV_BAR,
-       NVDEV_SUBDEV_PMU,
-       NVDEV_SUBDEV_VOLT,
-       NVDEV_SUBDEV_THERM,
-       NVDEV_SUBDEV_CLK,
-
-       NVDEV_ENGINE_FIRST,
-       NVDEV_ENGINE_DMAOBJ = NVDEV_ENGINE_FIRST,
-       NVDEV_ENGINE_IFB,
-       NVDEV_ENGINE_FIFO,
-       NVDEV_ENGINE_SW,
-       NVDEV_ENGINE_GR,
-       NVDEV_ENGINE_MPEG,
-       NVDEV_ENGINE_ME,
-       NVDEV_ENGINE_VP,
-       NVDEV_ENGINE_CIPHER,
-       NVDEV_ENGINE_BSP,
-       NVDEV_ENGINE_MSPPP,
-       NVDEV_ENGINE_CE0,
-       NVDEV_ENGINE_CE1,
-       NVDEV_ENGINE_CE2,
-       NVDEV_ENGINE_VIC,
-       NVDEV_ENGINE_MSENC,
-       NVDEV_ENGINE_DISP,
-       NVDEV_ENGINE_PM,
-       NVDEV_ENGINE_MSVLD,
-       NVDEV_ENGINE_SEC,
-       NVDEV_ENGINE_MSPDEC,
-
-       NVDEV_SUBDEV_NR,
-};
-#endif
 
 #define _nvkm_engine_dtor _nvkm_subdev_dtor
 #define _nvkm_engine_init _nvkm_subdev_init
 #define _nvkm_engine_fini _nvkm_subdev_fini
+
+#include <core/device.h>
 #endif
 
 #ifndef __NVKM_SUBDEV_H__
 #define __NVKM_SUBDEV_H__
 #include <core/object.h>
-#include <core/devidx.h>
 
 #define NV_SUBDEV_(sub,var) (NV_SUBDEV_CLASS | ((var) << 8) | (sub))
 #define NV_SUBDEV(name,var)  NV_SUBDEV_(NVDEV_SUBDEV_##name, (var))
        nv_wr32(obj, addr, (temp & ~mask) | data);
        return temp;
 }
+
+#include <core/engine.h>
 #endif
 
 #ifndef __NOUVEAU_VGA_H__
 #define __NOUVEAU_VGA_H__
-
-#include <core/os.h>
+#include <core/subdev.h>
 
 /* access to various legacy io ports */
 u8   nv_rdport(void *obj, int head, u16 port);
 bool nv_lockvgac(void *obj, bool lock);
 u8   nv_rdvgaowner(void *obj);
 void nv_wrvgaowner(void *obj, u8);
-
 #endif
 
 #include "fuc/gt215.fuc3.h"
 
 #include <core/client.h>
-#include <core/device.h>
 #include <core/enum.h>
 
 struct gt215_ce_priv {
 
 #include "priv.h"
 
 #include <core/client.h>
-#include <core/device.h>
 
 #include <nvif/class.h>
 #include <nvif/unpack.h>
 
 #include "outpdp.h"
 
 #include <core/client.h>
-#include <core/device.h>
 #include <core/engctx.h>
 #include <core/enum.h>
 #include <core/handle.h>
 
 #include "nv50.h"
 #include "outpdp.h"
 
-#include <core/device.h>
 #include <subdev/timer.h>
 
 static inline u32
 
  */
 #include <subdev/vga.h>
 
-#include <core/device.h>
-
 u8
 nv_rdport(void *obj, int head, u16 port)
 {
 
 #include "priv.h"
 
 #include <core/client.h>
-#include <core/device.h>
 #include <subdev/fb.h>
 #include <subdev/instmem.h>
 
 
  */
 #include <engine/falcon.h>
 
-#include <core/device.h>
 #include <subdev/timer.h>
 
 void
 
 #include <engine/fifo.h>
 
 #include <core/client.h>
-#include <core/device.h>
 #include <core/handle.h>
 #include <core/notify.h>
 #include <engine/dmaobj.h>
 
 #include "nv04.h"
 
 #include <core/client.h>
-#include <core/device.h>
 #include <core/engctx.h>
 #include <core/handle.h>
 #include <core/ramht.h>
 
 #include "nv04.h"
 
 #include <core/client.h>
-#include <core/device.h>
 #include <core/engctx.h>
 #include <core/ramht.h>
 #include <subdev/fb.h>
 
 
 #include "ctxnv40.h"
 #include "nv40.h"
-#include <core/device.h>
 
 /* TODO:
  *  - get vs count from 0x1540
 
 
 #include "ctxnv40.h"
 
-#include <core/device.h>
 #include <subdev/fb.h>
 
 #define IS_NVA3F(x) (((x) > 0xa0 && (x) < 0xaa) || (x) == 0xaf)
 
 #include "fuc/os.h"
 
 #include <core/client.h>
-#include <core/device.h>
 #include <core/handle.h>
 #include <core/option.h>
 #include <engine/fifo.h>
 
 #include "regs.h"
 
 #include <core/client.h>
-#include <core/device.h>
 #include <core/handle.h>
 #include <engine/fifo.h>
 #include <subdev/instmem.h>
 
 #include "regs.h"
 
 #include <core/client.h>
-#include <core/device.h>
 #include <core/handle.h>
 #include <engine/fifo.h>
 #include <subdev/fb.h>
 
 #include "regs.h"
 
 #include <core/client.h>
-#include <core/device.h>
 #include <core/handle.h>
 #include <engine/fifo.h>
 #include <subdev/fb.h>
 
 #include "nv20.h"
 #include "regs.h"
 
-#include <core/device.h>
 #include <engine/fifo.h>
 #include <subdev/fb.h>
 
 
 #define __NV40_GR_H__
 #include <engine/gr.h>
 
-#include <core/device.h>
 struct nvkm_gpuobj;
 
 /* returns 1 if device is one of the nv4x using the 0x4497 object class,
 
 #include "nv50.h"
 
 #include <core/client.h>
-#include <core/device.h>
 #include <core/handle.h>
 #include <engine/fifo.h>
 #include <subdev/timer.h>
 
 #include "priv.h"
 
 #include <core/client.h>
-#include <core/device.h>
 #include <core/option.h>
 
 #include <nvif/class.h>
 
  */
 #include "nv50.h"
 
-#include <core/device.h>
 #include <core/handle.h>
 #include <core/namedb.h>
 #include <engine/disp.h>
 
  * OTHER DEALINGS IN THE SOFTWARE.
  */
 #include <engine/xtensa.h>
-#include <core/device.h>
 
 #include <core/engctx.h>
 
 
  */
 #include "priv.h"
 
-#include <core/device.h>
 #include <subdev/fb.h>
 #include <subdev/mmu.h>
 
 
  */
 #include "priv.h"
 
-#include <core/device.h>
 #include <core/gpuobj.h>
 #include <subdev/fb.h>
 #include <subdev/mmu.h>
 
  */
 #include "priv.h"
 
-#include <core/device.h>
 #include <core/gpuobj.h>
 #include <subdev/fb.h>
 #include <subdev/mmu.h>
 
 #include <subdev/bios.h>
 #include <subdev/bios/dcb.h>
 
-#include <core/device.h>
-
 u16
 dcb_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
 {
 
 #include <subdev/bios/init.h>
 #include <subdev/bios/ramcfg.h>
 
-#include <core/device.h>
 #include <subdev/devinit.h>
 #include <subdev/gpio.h>
 #include <subdev/i2c.h>
 
 #include <subdev/bios/bit.h>
 #include <subdev/bios/perf.h>
 
-#include <core/device.h>
-
 u16
 nvbios_perf_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr,
                  u8 *cnt, u8 *len, u8 *snr, u8 *ssz)
 
 #include <subdev/bios/pll.h>
 #include <subdev/vga.h>
 
-#include <core/device.h>
 
 struct pll_mapping {
        u8  type;
 
  */
 #include "priv.h"
 
-#include <core/device.h>
 #include <core/option.h>
 #include <subdev/bios.h>
 #include <subdev/bios/image.h>
 
  */
 #include "priv.h"
 
-#include <core/device.h>
-
 #if defined(CONFIG_ACPI) && defined(CONFIG_X86)
 int nouveau_acpi_get_bios_chunk(uint8_t *bios, int offset, int len);
 bool nouveau_acpi_rom_supported(struct pci_dev *pdev);
 
  */
 #include "priv.h"
 
-#include <core/device.h>
 
 #if defined(__powerpc__)
 struct priv {
 
  */
 #include "priv.h"
 
-#include <core/device.h>
-
 struct priv {
        struct pci_dev *pdev;
        void __iomem *rom;
 
  */
 #include "priv.h"
 
-#include <core/device.h>
-
 struct priv {
        struct nvkm_bios *bios;
        u32 bar0;
 
  */
 #include "priv.h"
 
-#include <core/device.h>
-
 static u32
 prom_read(void *data, u32 offset, u32 length, struct nvkm_bios *bios)
 {
 
 #include <subdev/bios/bit.h>
 #include <subdev/bios/therm.h>
 
-#include <core/device.h>
-
 static u16
 therm_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *len, u8 *cnt)
 {
 
 #include <subdev/therm.h>
 #include <subdev/volt.h>
 
-#include <core/device.h>
 #include <core/option.h>
 
 /******************************************************************************
 
 #include <subdev/clk.h>
 #include "pll.h"
 
-#include <core/device.h>
 #include <subdev/bios.h>
 #include <subdev/bios/pll.h>
 #include <subdev/timer.h>
 
 #include <subdev/clk.h>
 #include "pll.h"
 
-#include <core/device.h>
 #include <subdev/timer.h>
 #include <subdev/bios.h>
 #include <subdev/bios/pll.h>
 
 #include <subdev/clk.h>
 #include <subdev/timer.h>
 
-#include <core/device.h>
-
 #ifdef __KERNEL__
 #include <nouveau_platform.h>
 #endif
 
 #include "gt215.h"
 #include "pll.h"
 
-#include <core/device.h>
 #include <engine/fifo.h>
 #include <subdev/bios.h>
 #include <subdev/bios/pll.h>
 
 #include "gt215.h"
 #include "pll.h"
 
-#include <core/device.h>
 #include <subdev/bios.h>
 #include <subdev/bios/pll.h>
 #include <subdev/timer.h>
 
 #include <subdev/clk.h>
 #include "pll.h"
 
-#include <core/device.h>
 #include <subdev/bios.h>
 #include <subdev/bios/pll.h>
 
 
 #include "pll.h"
 #include "seq.h"
 
-#include <core/device.h>
 #include <subdev/bios.h>
 #include <subdev/bios/pll.h>
 
 
  */
 #include "priv.h"
 
-#include <core/device.h>
 #include <core/option.h>
 #include <subdev/vga.h>
 
 
  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
  */
-#include <core/device.h>
 #include <subdev/fb/regsnv04.h>
 
 #define NV04_PFB_DEBUG_0                                       0x00100080
 
  */
 #include "gf100.h"
 
-#include <core/device.h>
-
 extern const u8 gf100_pte_storage_type_map[256];
 
 bool
 
  */
 #include "nv04.h"
 
-#include <core/device.h>
-
 void
 nv30_fb_tile_init(struct nvkm_fb *pfb, int i, u32 addr, u32 size, u32 pitch,
                  u32 flags, struct nvkm_fb_tile *tile)
 
 #include "nv50.h"
 
 #include <core/client.h>
-#include <core/device.h>
 #include <core/engctx.h>
 #include <core/enum.h>
 
 
 #include "gf100.h"
 #include "ramfuc.h"
 
-#include <core/device.h>
 #include <core/option.h>
 #include <subdev/bios.h>
 #include <subdev/bios/pll.h>
 
 #include "ramfuc.h"
 #include "gf100.h"
 
-#include <core/device.h>
 #include <core/option.h>
 #include <subdev/bios.h>
 #include <subdev/bios/init.h>
 
 #include "ramfuc.h"
 #include "nv50.h"
 
-#include <core/device.h>
 #include <core/option.h>
 #include <subdev/bios.h>
 #include <subdev/bios/M0205.h>
 
  */
 #include "priv.h"
 
-#include <core/device.h>
-
 static int
 nv1a_ram_create(struct nvkm_object *parent, struct nvkm_object *engine,
                struct nvkm_oclass *oclass, void *data, u32 size,
 
  */
 #include "nv40.h"
 
-#include <core/device.h>
 #include <subdev/bios.h>
 #include <subdev/bios/bit.h>
 #include <subdev/bios/init.h>
 
 #include "nv50.h"
 #include "ramseq.h"
 
-#include <core/device.h>
 #include <core/option.h>
 #include <subdev/bios.h>
 #include <subdev/bios/perf.h>
 
  */
 #include "priv.h"
 
-#include <core/device.h>
 #include <core/notify.h>
 
 static int
 
 #include "priv.h"
 #include "pad.h"
 
-#include <core/device.h>
 #include <core/notify.h>
 #include <core/option.h>
 #include <subdev/bios.h>
 
 
 #include <subdev/fb.h>
 #include <core/mm.h>
-#include <core/device.h>
 
 #ifdef __KERNEL__
 #include <linux/dma-attrs.h>
 
  */
 #include "priv.h"
 
-#include <core/device.h>
 #include <core/option.h>
 
 static inline void
 
  */
 #include "nv04.h"
 
-#include <core/device.h>
-
 const struct nvkm_mc_intr
 nv50_mc_intr[] = {
        { 0x04000000, NVDEV_ENGINE_DISP },  /* DISP before FIFO, so pageflip-timestamping works! */
 
  */
 #include "nv04.h"
 
-#include <core/device.h>
 #include <core/gpuobj.h>
 
 #define NV04_PDMA_SIZE (128 * 1024 * 1024)
 
  */
 #include "nv04.h"
 
-#include <core/device.h>
 #include <core/gpuobj.h>
 #include <core/option.h>
 #include <subdev/timer.h>
 
  */
 #include "nv04.h"
 
-#include <core/device.h>
 #include <core/gpuobj.h>
 #include <core/option.h>
 #include <subdev/timer.h>
 
  */
 #include "mxms.h"
 
-#include <core/device.h>
 #include <core/option.h>
 #include <subdev/bios.h>
 #include <subdev/bios/mxm.h>
 
 #define __NVKM_PMU_MEMX_H__
 #include "priv.h"
 
-#include <core/device.h>
-
 struct nvkm_memx {
        struct nvkm_pmu *pmu;
        u32 base;
 
  */
 #include "priv.h"
 
-#include <core/device.h>
-
 static int
 nvkm_therm_update_trip(struct nvkm_therm *therm)
 {
 
  */
 #include "priv.h"
 
-#include <core/device.h>
 #include <core/option.h>
 #include <subdev/bios.h>
 #include <subdev/bios/fan.h>
 
  */
 #include "priv.h"
 
-#include <core/device.h>
-
 struct gf110_therm_priv {
        struct nvkm_therm_priv base;
 };
 
  */
 #include "priv.h"
 
-#include <core/device.h>
-
 struct gm107_therm_priv {
        struct nvkm_therm_priv base;
 };
 
  */
 #include "priv.h"
 
-#include <core/device.h>
 #include <subdev/gpio.h>
 
 struct gt215_therm_priv {
 
  */
 #include "priv.h"
 
-#include <core/device.h>
-
 struct nv40_therm_priv {
        struct nvkm_therm_priv base;
 };
 
  */
 #include "priv.h"
 
-#include <core/device.h>
-
 struct nv50_therm_priv {
        struct nvkm_therm_priv base;
 };
 
  */
 #include "nv04.h"
 
-#include <core/device.h>
-
 static u64
 nv04_timer_read(struct nvkm_timer *ptimer)
 {