void __iomem *reg_base;
        spinlock_t lock; /* canvas device lock */
        u8 used[NUM_CANVAS];
+       bool supports_endianness;
 };
 
 static void canvas_write(struct meson_canvas *canvas, u32 reg, u32 val)
 {
        unsigned long flags;
 
+       if (endian && !canvas->supports_endianness) {
+               dev_err(canvas->dev,
+                       "Endianness is not supported on this SoC\n");
+               return -EINVAL;
+       }
+
        spin_lock_irqsave(&canvas->lock, flags);
        if (!canvas->used[canvas_index]) {
                dev_err(canvas->dev,
        if (IS_ERR(canvas->reg_base))
                return PTR_ERR(canvas->reg_base);
 
+       canvas->supports_endianness = of_device_get_match_data(dev);
+
        canvas->dev = dev;
        spin_lock_init(&canvas->lock);
        dev_set_drvdata(dev, canvas);
 }
 
 static const struct of_device_id canvas_dt_match[] = {
-       { .compatible = "amlogic,canvas" },
+       { .compatible = "amlogic,meson8-canvas", .data = (void *)false, },
+       { .compatible = "amlogic,meson8b-canvas", .data = (void *)false, },
+       { .compatible = "amlogic,meson8m2-canvas", .data = (void *)false, },
+       { .compatible = "amlogic,canvas", .data = (void *)true, },
        {}
 };
 MODULE_DEVICE_TABLE(of, canvas_dt_match);