sdp4430_lcd_init();
        sdp4430_picodlp_init();
        omap_display_init(&sdp4430_dss_data);
-       omap_hdmi_init();
+       /*
+        * OMAP4460SDP/Blaze and OMAP4430 ES2.3 SDP/Blaze boards and
+        * later have external pull up on the HDMI I2C lines
+        */
+       if (cpu_is_omap446x() || omap_rev() > OMAP4430_REV_ES2_2)
+               omap_hdmi_init(OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP);
+       else
+               omap_hdmi_init(0);
 }
 
 #ifdef CONFIG_OMAP_MUX
 
                pr_err("error initializing panda DVI\n");
 
        omap_display_init(&omap4_panda_dss_data);
-       omap_hdmi_init();
+
+       /*
+        * OMAP4460SDP/Blaze and OMAP4430 ES2.3 SDP/Blaze boards and
+        * later have external pull up on the HDMI I2C lines
+        */
+       if (cpu_is_omap446x() || omap_rev() > OMAP4430_REV_ES2_2)
+               omap_hdmi_init(OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP);
+       else
+               omap_hdmi_init(0);
 }
 
 static void __init omap4_panda_init(void)
 
        { "dss_hdmi", "omapdss_hdmi", -1 },
 };
 
-static void omap4_hdmi_mux_pads()
+static void omap4_hdmi_mux_pads(enum omap_hdmi_flags flags)
 {
+       u32 reg;
+       u16 control_i2c_1;
+
        /* PAD0_HDMI_HPD_PAD1_HDMI_CEC */
        omap_mux_init_signal("hdmi_hpd",
                        OMAP_PIN_INPUT_PULLUP);
                        OMAP_PIN_INPUT_PULLUP);
        omap_mux_init_signal("hdmi_ddc_sda",
                        OMAP_PIN_INPUT_PULLUP);
+
+       /*
+        * CONTROL_I2C_1: HDMI_DDC_SDA_PULLUPRESX (bit 28) and
+        * HDMI_DDC_SCL_PULLUPRESX (bit 24) are set to disable
+        * internal pull up resistor.
+        */
+       if (flags & OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP) {
+               control_i2c_1 = OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_I2C_1;
+               reg = omap4_ctrl_pad_readl(control_i2c_1);
+               reg |= (OMAP4_HDMI_DDC_SDA_PULLUPRESX_MASK |
+                       OMAP4_HDMI_DDC_SCL_PULLUPRESX_MASK);
+                       omap4_ctrl_pad_writel(reg, control_i2c_1);
+       }
 }
 
 static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes)
        return 0;
 }
 
-int omap_hdmi_init(void)
+int omap_hdmi_init(enum omap_hdmi_flags flags)
 {
        if (cpu_is_omap44xx())
-               omap4_hdmi_mux_pads();
+               omap4_hdmi_mux_pads(flags);
 
        return 0;
 }
 
        OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI,    /* OMAP4: PLL2_CLK2 */
 };
 
+enum omap_hdmi_flags {
+       OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP = 1 << 0,
+};
+
 /* RFBI */
 
 struct rfbi_timings {
 /* Init with the board info */
 extern int omap_display_init(struct omap_dss_board_info *board_data);
 /* HDMI mux init*/
-extern int omap_hdmi_init(void);
+extern int omap_hdmi_init(enum omap_hdmi_flags flags);
 
 struct omap_display_platform_data {
        struct omap_dss_board_info *board_data;