}
 
 static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc,
-                                     intel_clock_t *clock, u32 *fp)
+                                     intel_clock_t *clock, u32 *fp,
+                                     intel_clock_t *reduced_clock, u32 *fp2)
 {
        struct drm_crtc *crtc = &intel_crtc->base;
        struct drm_device *dev = crtc->dev;
        if (clock->m < factor * clock->n)
                *fp |= FP_CB_TUNE;
 
+       if (fp2 && (reduced_clock->m < factor * reduced_clock->n))
+               *fp2 |= FP_CB_TUNE;
+
        dpll = 0;
 
        if (is_lvds)
                fp2 = reduced_clock.n << 16 | reduced_clock.m1 << 8 |
                        reduced_clock.m2;
 
-       dpll = ironlake_compute_dpll(intel_crtc, &clock, &fp);
+       dpll = ironlake_compute_dpll(intel_crtc, &clock, &fp, &reduced_clock,
+                                    has_reduced_clock ? &fp2 : NULL);
 
        DRM_DEBUG_KMS("Mode for pipe %d:\n", pipe);
        drm_mode_debug_printmodeline(mode);