dsi_cio_timings(dsi);
 
-       if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) {
-               /* DDR_CLK_ALWAYS_ON */
-               REG_FLD_MOD(dsi, DSI_CLK_CTRL,
-                       dsi->vm_timings.ddr_clk_always_on, 13, 13);
-       }
+       /* DDR_CLK_ALWAYS_ON */
+       REG_FLD_MOD(dsi, DSI_CLK_CTRL,
+                   !(dsi->dsidev->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS),
+                   13, 13);
 
        dsi->ulps_enabled = false;
 
        dsi_force_tx_stop_mode_io(dsi);
 
        /* start the DDR clock by sending a NULL packet */
-       if (dsi->vm_timings.ddr_clk_always_on)
+       if (!(dsi->dsidev->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS))
                dsi_vc_send_null(dsi, VC_CMD, dsi->dsidev->channel);
 }
 
        dsi_vm->hfp_blanking_mode = 1;
        dsi_vm->hbp_blanking_mode = 1;
 
-       dsi_vm->ddr_clk_always_on = cfg->ddr_clk_always_on;
        dsi_vm->window_sync = 4;
 
        /* setup DISPC videomode */
 
 
        enum omap_dss_dsi_trans_mode trans_mode;
 
-       bool ddr_clk_always_on;
        int window_sync;
 };
 
        unsigned long hs_clk_min, hs_clk_max;
        unsigned long lp_clk_min, lp_clk_max;
 
-       bool ddr_clk_always_on;
        enum omap_dss_dsi_trans_mode trans_mode;
 };