perf arm_spe: Add "event_filter" entry in meta data

Add a new "event_filter" entry in the meta data and dump it in raw data
mode.

After:

  # perf script -D
  ...

  0 0 0x470 [0x1f0]: PERF_RECORD_AUXTRACE_INFO type: 4
    Header version     :2
    Header size        :4
    PMU type v2        :11
    CPU number         :8
      Magic            :0x1010101010101010
      CPU #            :0
      Num of params    :4
      MIDR             :0x410fd0f0
      PMU Type         :11
      Min Interval     :256
      Event Filter     :0x3fe08fe

  ...

Reviewed-by: James Clark <james.clark@linaro.org>
Signed-off-by: Leo Yan <leo.yan@arm.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ali Saidi <alisaidi@amazon.com>
Cc: German Gomez <german.gomez@arm.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Will Deacon <will@kernel.org>
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>

diff --git a/tools/perf/arch/arm64/util/arm-spe.c b/tools/perf/arch/arm64/util/arm-spe.c
index 4f2833b62ff55f3fd1dff3f032d6e06528460939..cac43cde7dbee94884938482d03989a2c69cb0b1 100644 (file)
--- a/tools/perf/arch/arm64/util/arm-spe.c
+++ b/tools/perf/arch/arm64/util/arm-spe.c
@@ -121,12 +121,17 @@ static int arm_spe_save_cpu_header(struct auxtrace_record *itr,
                /* No Arm SPE PMU is found */
                data[ARM_SPE_CPU_PMU_TYPE] = ULLONG_MAX;
                data[ARM_SPE_CAP_MIN_IVAL] = 0;
+               data[ARM_SPE_CAP_EVENT_FILTER] = 0;
        } else {
                data[ARM_SPE_CPU_PMU_TYPE] = pmu->type;
 
                if (perf_pmu__scan_file(pmu, "caps/min_interval", "%lu", &val) != 1)
                        val = 0;
                data[ARM_SPE_CAP_MIN_IVAL] = val;
+
+               if (perf_pmu__scan_file(pmu, "caps/event_filter", "%lx", &val) != 1)
+                       val = 0;
+               data[ARM_SPE_CAP_EVENT_FILTER] = val;
        }
 
        free(cpuid);

diff --git a/tools/perf/util/arm-spe.c b/tools/perf/util/arm-spe.c
index 38e6f8331f2790b9cd3bc94d5a18657d7e0f5e42..24968fc15693e4e6dcbe67dcdc85a261e0f701b7 100644 (file)
--- a/tools/perf/util/arm-spe.c
+++ b/tools/perf/util/arm-spe.c
@@ -1532,6 +1532,7 @@ static const char * const metadata_per_cpu_fmts[] = {
        [ARM_SPE_CPU_MIDR]              = "    MIDR             :0x%"PRIx64"\n",
        [ARM_SPE_CPU_PMU_TYPE]          = "    PMU Type         :%"PRId64"\n",
        [ARM_SPE_CAP_MIN_IVAL]          = "    Min Interval     :%"PRId64"\n",
+       [ARM_SPE_CAP_EVENT_FILTER]      = "    Event Filter     :0x%"PRIx64"\n",
 };
 
 static void arm_spe_print_info(struct arm_spe *spe, __u64 *arr)

diff --git a/tools/perf/util/arm-spe.h b/tools/perf/util/arm-spe.h
index 390679a4af2fb61419bc881b5dc43c01f1dd77d7..3966df1856d8234bb5fe580c3f128c4d238c6221 100644 (file)
--- a/tools/perf/util/arm-spe.h
+++ b/tools/perf/util/arm-spe.h
@@ -47,6 +47,8 @@ enum {
        ARM_SPE_CPU_PMU_TYPE,
        /* Minimal interval */
        ARM_SPE_CAP_MIN_IVAL,
+       /* Event filter */
+       ARM_SPE_CAP_EVENT_FILTER,
        ARM_SPE_CPU_PRIV_MAX,
 };