drm/i915: move icl_sagv_{pre, post}_plane_update() to intel_bw.c

Prefer only looking at struct intel_bw_state internals inside
intel_bw.c. To that effect, move icl_sagv_{pre,post}_plane_update()
there.

Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://lore.kernel.org/r/dedcbeb3389ecd50195aa37de75e9992fae5d197.1750847509.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 32e38eeb8128dac684d67b55c7237c9fbaee4445..3c3b4dd71ec331216735236611867d6d624824c6 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -153,8 +153,8 @@ static bool is_sagv_enabled(struct intel_display *display, u16 points_mask)
                              ICL_PCODE_REQ_QGV_PT_MASK);
 }
 
-int icl_pcode_restrict_qgv_points(struct intel_display *display,
-                                 u32 points_mask)
+static int icl_pcode_restrict_qgv_points(struct intel_display *display,
+                                        u32 points_mask)
 {
        int ret;
 
@@ -981,6 +981,70 @@ static void icl_force_disable_sagv(struct intel_display *display,
        icl_pcode_restrict_qgv_points(display, bw_state->qgv_points_mask);
 }
 
+void icl_sagv_pre_plane_update(struct intel_atomic_state *state)
+{
+       struct intel_display *display = to_intel_display(state);
+       const struct intel_bw_state *old_bw_state =
+               intel_atomic_get_old_bw_state(state);
+       const struct intel_bw_state *new_bw_state =
+               intel_atomic_get_new_bw_state(state);
+       u16 old_mask, new_mask;
+
+       if (!new_bw_state)
+               return;
+
+       old_mask = old_bw_state->qgv_points_mask;
+       new_mask = old_bw_state->qgv_points_mask | new_bw_state->qgv_points_mask;
+
+       if (old_mask == new_mask)
+               return;
+
+       WARN_ON(!new_bw_state->base.changed);
+
+       drm_dbg_kms(display->drm, "Restricting QGV points: 0x%x -> 0x%x\n",
+                   old_mask, new_mask);
+
+       /*
+        * Restrict required qgv points before updating the configuration.
+        * According to BSpec we can't mask and unmask qgv points at the same
+        * time. Also masking should be done before updating the configuration
+        * and unmasking afterwards.
+        */
+       icl_pcode_restrict_qgv_points(display, new_mask);
+}
+
+void icl_sagv_post_plane_update(struct intel_atomic_state *state)
+{
+       struct intel_display *display = to_intel_display(state);
+       const struct intel_bw_state *old_bw_state =
+               intel_atomic_get_old_bw_state(state);
+       const struct intel_bw_state *new_bw_state =
+               intel_atomic_get_new_bw_state(state);
+       u16 old_mask, new_mask;
+
+       if (!new_bw_state)
+               return;
+
+       old_mask = old_bw_state->qgv_points_mask | new_bw_state->qgv_points_mask;
+       new_mask = new_bw_state->qgv_points_mask;
+
+       if (old_mask == new_mask)
+               return;
+
+       WARN_ON(!new_bw_state->base.changed);
+
+       drm_dbg_kms(display->drm, "Relaxing QGV points: 0x%x -> 0x%x\n",
+                   old_mask, new_mask);
+
+       /*
+        * Allow required qgv points after updating the configuration.
+        * According to BSpec we can't mask and unmask qgv points at the same
+        * time. Also masking should be done before updating the configuration
+        * and unmasking afterwards.
+        */
+       icl_pcode_restrict_qgv_points(display, new_mask);
+}
+
 static int mtl_find_qgv_points(struct intel_display *display,
                               unsigned int data_rate,
                               unsigned int num_active_planes,

diff --git a/drivers/gpu/drm/i915/display/intel_bw.h b/drivers/gpu/drm/i915/display/intel_bw.h
index ee6e4a7ac89d6b3cf1a93da472ef34b96d67a033..68b95c2a0cb9268e3a59bdec4f969de57df9c7e2 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_bw.h
+++ b/drivers/gpu/drm/i915/display/intel_bw.h
@@ -67,8 +67,6 @@ intel_atomic_get_bw_state(struct intel_atomic_state *state);
 void intel_bw_init_hw(struct intel_display *display);
 int intel_bw_init(struct intel_display *display);
 int intel_bw_atomic_check(struct intel_atomic_state *state, bool any_ms);
-int icl_pcode_restrict_qgv_points(struct intel_display *display,
-                                 u32 points_mask);
 int intel_bw_calc_min_cdclk(struct intel_atomic_state *state,
                            bool *need_cdclk_calc);
 int intel_bw_min_cdclk(struct intel_display *display,
@@ -79,5 +77,7 @@ void intel_bw_crtc_disable_noatomic(struct intel_crtc *crtc);
 bool intel_bw_pmdemand_needs_update(struct intel_atomic_state *state);
 bool intel_bw_can_enable_sagv(struct intel_display *display,
                              const struct intel_bw_state *bw_state);
+void icl_sagv_pre_plane_update(struct intel_atomic_state *state);
+void icl_sagv_post_plane_update(struct intel_atomic_state *state);
 
 #endif /* __INTEL_BW_H__ */

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 514d9cd45d69f8659411cf56280cfab1d1e78dd8..f98c4a0fc7a9785776343f2074e81f340e0fc679 100644 (file)
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -265,70 +265,6 @@ static void skl_sagv_post_plane_update(struct intel_atomic_state *state)
                skl_sagv_enable(display);
 }
 
-static void icl_sagv_pre_plane_update(struct intel_atomic_state *state)
-{
-       struct intel_display *display = to_intel_display(state);
-       const struct intel_bw_state *old_bw_state =
-               intel_atomic_get_old_bw_state(state);
-       const struct intel_bw_state *new_bw_state =
-               intel_atomic_get_new_bw_state(state);
-       u16 old_mask, new_mask;
-
-       if (!new_bw_state)
-               return;
-
-       old_mask = old_bw_state->qgv_points_mask;
-       new_mask = old_bw_state->qgv_points_mask | new_bw_state->qgv_points_mask;
-
-       if (old_mask == new_mask)
-               return;
-
-       WARN_ON(!new_bw_state->base.changed);
-
-       drm_dbg_kms(display->drm, "Restricting QGV points: 0x%x -> 0x%x\n",
-                   old_mask, new_mask);
-
-       /*
-        * Restrict required qgv points before updating the configuration.
-        * According to BSpec we can't mask and unmask qgv points at the same
-        * time. Also masking should be done before updating the configuration
-        * and unmasking afterwards.
-        */
-       icl_pcode_restrict_qgv_points(display, new_mask);
-}
-
-static void icl_sagv_post_plane_update(struct intel_atomic_state *state)
-{
-       struct intel_display *display = to_intel_display(state);
-       const struct intel_bw_state *old_bw_state =
-               intel_atomic_get_old_bw_state(state);
-       const struct intel_bw_state *new_bw_state =
-               intel_atomic_get_new_bw_state(state);
-       u16 old_mask, new_mask;
-
-       if (!new_bw_state)
-               return;
-
-       old_mask = old_bw_state->qgv_points_mask | new_bw_state->qgv_points_mask;
-       new_mask = new_bw_state->qgv_points_mask;
-
-       if (old_mask == new_mask)
-               return;
-
-       WARN_ON(!new_bw_state->base.changed);
-
-       drm_dbg_kms(display->drm, "Relaxing QGV points: 0x%x -> 0x%x\n",
-                   old_mask, new_mask);
-
-       /*
-        * Allow required qgv points after updating the configuration.
-        * According to BSpec we can't mask and unmask qgv points at the same
-        * time. Also masking should be done before updating the configuration
-        * and unmasking afterwards.
-        */
-       icl_pcode_restrict_qgv_points(display, new_mask);
-}
-
 void intel_sagv_pre_plane_update(struct intel_atomic_state *state)
 {
        struct intel_display *display = to_intel_display(state);