__u32   spinlock_lockval;               /* 0x02fc */
 
        /* Interrupt response block */
-       __u8    irb[64];                        /* 0x0300 */
+       __u8    irb[96];                        /* 0x0300 */
 
-       __u8    pad_0x0340[0x0e00-0x0340];      /* 0x0340 */
+       __u8    pad_0x0360[0x0e00-0x0360];      /* 0x0360 */
 
        /*
         * 0xe00 contains the address of the IPL Parameter Information
        __u8    pad_0x03a0[0x0400-0x03a4];      /* 0x03a4 */
 
        /* Interrupt response block. */
-       __u8    irb[64];                        /* 0x0400 */
+       __u8    irb[96];                        /* 0x0400 */
+       __u8    pad_0x0460[0x0480-0x0460];      /* 0x0460 */
 
        /* Per cpu primary space access list */
-       __u32   paste[16];                      /* 0x0440 */
+       __u32   paste[16];                      /* 0x0480 */
 
-       __u8    pad_0x0480[0x0e00-0x0480];      /* 0x0480 */
+       __u8    pad_0x04c0[0x0e00-0x04c0];      /* 0x04c0 */
 
        /*
         * 0xe00 contains the address of the IPL Parameter Information