.mmc_caps = MMC_CAP_3_3V_DDR,
 };
 
+static const struct sdhci_pltfm_data sdhci_bcm7211a0_pltfm_data = {
+       .quirks = SDHCI_QUIRK_MISSING_CAPS |
+               SDHCI_QUIRK_BROKEN_TIMEOUT_VAL |
+               SDHCI_QUIRK_BROKEN_DMA |
+               SDHCI_QUIRK_BROKEN_ADMA,
+       .ops = &sdhci_iproc_ops,
+};
+
+#define BCM7211A0_BASE_CLK_MHZ 100
+static const struct sdhci_iproc_data bcm7211a0_data = {
+       .pdata = &sdhci_bcm7211a0_pltfm_data,
+       .caps = ((BCM7211A0_BASE_CLK_MHZ / 2) << SDHCI_TIMEOUT_CLK_SHIFT) |
+               (BCM7211A0_BASE_CLK_MHZ << SDHCI_CLOCK_BASE_SHIFT) |
+               ((0x2 << SDHCI_MAX_BLOCK_SHIFT)
+                       & SDHCI_MAX_BLOCK_MASK) |
+               SDHCI_CAN_VDD_330 |
+               SDHCI_CAN_VDD_180 |
+               SDHCI_CAN_DO_SUSPEND |
+               SDHCI_CAN_DO_HISPD,
+       .caps1 = SDHCI_DRIVER_TYPE_C |
+                SDHCI_DRIVER_TYPE_D,
+};
+
 static const struct of_device_id sdhci_iproc_of_match[] = {
        { .compatible = "brcm,bcm2835-sdhci", .data = &bcm2835_data },
        { .compatible = "brcm,bcm2711-emmc2", .data = &bcm2711_data },
        { .compatible = "brcm,sdhci-iproc-cygnus", .data = &iproc_cygnus_data},
        { .compatible = "brcm,sdhci-iproc", .data = &iproc_data },
+       { .compatible = "brcm,bcm7211a0-sdhci", .data = &bcm7211a0_data },
        { }
 };
 MODULE_DEVICE_TABLE(of, sdhci_iproc_of_match);
        return ret;
 }
 
+static void sdhci_iproc_shutdown(struct platform_device *pdev)
+{
+       sdhci_pltfm_suspend(&pdev->dev);
+}
+
 static struct platform_driver sdhci_iproc_driver = {
        .driver = {
                .name = "sdhci-iproc",
        },
        .probe = sdhci_iproc_probe,
        .remove = sdhci_pltfm_unregister,
+       .shutdown = sdhci_iproc_shutdown,
 };
 module_platform_driver(sdhci_iproc_driver);
 
 
 
 #define SDHCI_CAPABILITIES     0x40
 #define  SDHCI_TIMEOUT_CLK_MASK                GENMASK(5, 0)
+#define  SDHCI_TIMEOUT_CLK_SHIFT 0
 #define  SDHCI_TIMEOUT_CLK_UNIT        0x00000080
 #define  SDHCI_CLOCK_BASE_MASK         GENMASK(13, 8)
+#define  SDHCI_CLOCK_BASE_SHIFT        8
 #define  SDHCI_CLOCK_V3_BASE_MASK      GENMASK(15, 8)
 #define  SDHCI_MAX_BLOCK_MASK  0x00030000
 #define  SDHCI_MAX_BLOCK_SHIFT  16