else
                bnxt_fill_hw_rss_tbl(bp, vnic);
 
-       req->hash_type = cpu_to_le32(bp->rss_hash_cfg);
+       if (bp->rss_hash_delta) {
+               req->hash_type = cpu_to_le32(bp->rss_hash_delta);
+               if (bp->rss_hash_cfg & bp->rss_hash_delta)
+                       req->flags |= VNIC_RSS_CFG_REQ_FLAGS_HASH_TYPE_INCLUDE;
+               else
+                       req->flags |= VNIC_RSS_CFG_REQ_FLAGS_HASH_TYPE_EXCLUDE;
+       } else {
+               req->hash_type = cpu_to_le32(bp->rss_hash_cfg);
+       }
        req->hash_mode_flags = VNIC_RSS_CFG_REQ_HASH_MODE_FLAGS_DEFAULT;
        req->ring_grp_tbl_addr = cpu_to_le64(vnic->rss_table_dma_addr);
        req->hash_key_tbl_addr = cpu_to_le64(vnic->rss_hash_key_dma_addr);
        return rc;
 }
 
+static void bnxt_hwrm_update_rss_hash_cfg(struct bnxt *bp)
+{
+       struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
+       struct hwrm_vnic_rss_qcfg_output *resp;
+       struct hwrm_vnic_rss_qcfg_input *req;
+
+       if (hwrm_req_init(bp, req, HWRM_VNIC_RSS_QCFG))
+               return;
+
+       /* all contexts configured to same hash_type, zero always exists */
+       req->rss_ctx_idx = cpu_to_le16(vnic->fw_rss_cos_lb_ctx[0]);
+       resp = hwrm_req_hold(bp, req);
+       if (!hwrm_req_send(bp, req)) {
+               bp->rss_hash_cfg = le32_to_cpu(resp->hash_type) ?: bp->rss_hash_cfg;
+               bp->rss_hash_delta = 0;
+       }
+       hwrm_req_drop(bp, req);
+}
+
 static int bnxt_hwrm_vnic_set_hds(struct bnxt *bp, u16 vnic_id)
 {
        struct bnxt_vnic_info *vnic = &bp->vnic_info[vnic_id];
                    (BNXT_CHIP_P5_THOR(bp) &&
                     !(bp->fw_cap & BNXT_FW_CAP_EXT_HW_STATS_SUPPORTED)))
                        bp->fw_cap |= BNXT_FW_CAP_VLAN_RX_STRIP;
+               if (flags & VNIC_QCAPS_RESP_FLAGS_RSS_HASH_TYPE_DELTA_CAP)
+                       bp->fw_cap |= BNXT_FW_CAP_RSS_HASH_TYPE_DELTA;
                bp->max_tpa_v2 = le16_to_cpu(resp->max_aggs_supported);
                if (bp->max_tpa_v2) {
                        if (BNXT_CHIP_P5_THOR(bp))
        rc = bnxt_setup_vnic(bp, 0);
        if (rc)
                goto err_out;
+       if (bp->fw_cap & BNXT_FW_CAP_RSS_HASH_TYPE_DELTA)
+               bnxt_hwrm_update_rss_hash_cfg(bp);
 
        if (bp->flags & BNXT_FLAG_RFS) {
                rc = bnxt_alloc_rfs_vnics(bp);
                           VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4 |
                           VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6 |
                           VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
+       if (bp->fw_cap & BNXT_FW_CAP_RSS_HASH_TYPE_DELTA)
+               bp->rss_hash_delta = bp->rss_hash_cfg;
        if (BNXT_CHIP_P4_PLUS(bp) && bp->hwrm_spec_code >= 0x10501) {
                bp->flags |= BNXT_FLAG_UDP_RSS_CAP;
                bp->rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4 |
 
        u8      unused_0[7];
 };
 
+/* hwrm_vnic_rss_qcfg_input (size:192b/24B) */
+struct hwrm_vnic_rss_qcfg_input {
+       __le16  req_type;
+       __le16  cmpl_ring;
+       __le16  seq_id;
+       __le16  target_id;
+       __le64  resp_addr;
+       __le16  rss_ctx_idx;
+       __le16  vnic_id;
+       u8      unused_0[4];
+};
+
+/* hwrm_vnic_rss_qcfg_output (size:512b/64B) */
+struct hwrm_vnic_rss_qcfg_output {
+       __le16  error_code;
+       __le16  req_type;
+       __le16  seq_id;
+       __le16  resp_len;
+       __le32  hash_type;
+       #define VNIC_RSS_QCFG_RESP_HASH_TYPE_IPV4                0x1UL
+       #define VNIC_RSS_QCFG_RESP_HASH_TYPE_TCP_IPV4            0x2UL
+       #define VNIC_RSS_QCFG_RESP_HASH_TYPE_UDP_IPV4            0x4UL
+       #define VNIC_RSS_QCFG_RESP_HASH_TYPE_IPV6                0x8UL
+       #define VNIC_RSS_QCFG_RESP_HASH_TYPE_TCP_IPV6            0x10UL
+       #define VNIC_RSS_QCFG_RESP_HASH_TYPE_UDP_IPV6            0x20UL
+       #define VNIC_RSS_QCFG_RESP_HASH_TYPE_IPV6_FLOW_LABEL     0x40UL
+       #define VNIC_RSS_QCFG_RESP_HASH_TYPE_AH_SPI_IPV4         0x80UL
+       #define VNIC_RSS_QCFG_RESP_HASH_TYPE_ESP_SPI_IPV4        0x100UL
+       #define VNIC_RSS_QCFG_RESP_HASH_TYPE_AH_SPI_IPV6         0x200UL
+       #define VNIC_RSS_QCFG_RESP_HASH_TYPE_ESP_SPI_IPV6        0x400UL
+       u8      unused_0[4];
+       __le32  hash_key[10];
+       u8      hash_mode_flags;
+       #define VNIC_RSS_QCFG_RESP_HASH_MODE_FLAGS_DEFAULT         0x1UL
+       #define VNIC_RSS_QCFG_RESP_HASH_MODE_FLAGS_INNERMOST_4     0x2UL
+       #define VNIC_RSS_QCFG_RESP_HASH_MODE_FLAGS_INNERMOST_2     0x4UL
+       #define VNIC_RSS_QCFG_RESP_HASH_MODE_FLAGS_OUTERMOST_4     0x8UL
+       #define VNIC_RSS_QCFG_RESP_HASH_MODE_FLAGS_OUTERMOST_2     0x10UL
+       u8      ring_select_mode;
+       #define VNIC_RSS_QCFG_RESP_RING_SELECT_MODE_TOEPLITZ          0x0UL
+       #define VNIC_RSS_QCFG_RESP_RING_SELECT_MODE_XOR               0x1UL
+       #define VNIC_RSS_QCFG_RESP_RING_SELECT_MODE_TOEPLITZ_CHECKSUM 0x2UL
+       #define VNIC_RSS_QCFG_RESP_RING_SELECT_MODE_LAST             VNIC_RSS_QCFG_RESP_RING_SELECT_MODE_TOEPLITZ_CHECKSUM
+       u8      unused_1[5];
+       u8      valid;
+};
+
 /* hwrm_vnic_plcmodes_cfg_input (size:320b/40B) */
 struct hwrm_vnic_plcmodes_cfg_input {
        __le16  req_type;