Replace whitespaces by tabs

Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>

diff --git a/ChangeLog b/ChangeLog
index aba850f408aeb3197d4b77c78ff561882900a722..3013ffe32c9c1ed8e6b690b43fa15ca30a61ad1e 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -84,7 +84,7 @@
        * Add support for extlog trace events
        * Some fixes affecting sqlite handling
        * Handle failures of snprintf()
-        * Fix mce numfield decoded error
+       * Fix mce numfield decoded error
 
 2014-04-03     Mauro Carvalho Chehab <m.chehab@samsung.com>
        - Version 0.5.2

diff --git a/INSTALL b/INSTALL
index 8865734f81b136629e961c230380423899c75794..443a52f26276b33e696b2243ea713aaf8416a869 100644 (file)
--- a/INSTALL
+++ b/INSTALL
@@ -130,8 +130,8 @@ compiler but only a single '-arch' option to the preprocessor.  Like
 this:
 
      ./configure CC="gcc -arch i386 -arch x86_64 -arch ppc -arch ppc64" \
-                 CXX="g++ -arch i386 -arch x86_64 -arch ppc -arch ppc64" \
-                 CPP="gcc -E" CXXCPP="g++ -E"
+                CXX="g++ -arch i386 -arch x86_64 -arch ppc -arch ppc64" \
+                CPP="gcc -E" CXXCPP="g++ -E"
 
    This is not guaranteed to produce working output in all cases, you
 may have to build one architecture at a time and combine the results

diff --git a/mce-intel-haswell.c b/mce-intel-haswell.c
index b70e3995e3c1402be0ecabfec93056e139202443..1791a36d855f4fc688261bf0721375af2ee501c4 100644 (file)
--- a/mce-intel-haswell.c
+++ b/mce-intel-haswell.c
@@ -27,93 +27,93 @@
 /* See IA32 SDM Vol3B Table 16-20 */
 
 static char *pcu_1[] = {
-        [0x00] = "No Error",
-        [0x09] = "MC_MESSAGE_CHANNEL_TIMEOUT",
-        [0x0D] = "MC_IMC_FORCE_SR_S3_TIMEOUT",
-        [0x0E] = "MC_CPD_UNCPD_SD_TIMEOUT",
-        [0x13] = "MC_DMI_TRAINING_TIMEOUT",
-        [0x15] = "MC_DMI_CPU_RESET_ACK_TIMEOUT",
-        [0x1E] = "MC_VR_ICC_MAX_LT_FUSED_ICC_MAX",
-        [0x25] = "MC_SVID_COMMAN_TIMEOUT",
-        [0x29] = "MC_VR_VOUT_MAC_LT_FUSED_SVID",
-        [0x2B] = "MC_PKGC_WATCHDOG_HANG_CBZ_DOWN",
-        [0x2C] = "MC_PKGC_WATCHDOG_HANG_CBZ_UP",
-        [0x39] = "MC_PKGC_WATCHDOG_HANG_C3_UP_SF",
-        [0x44] = "MC_CRITICAL_VR_FAILED",
-        [0x45] = "MC_ICC_MAX_NOTSUPPORTED",
-        [0x46] = "MC_VID_RAMP_DOWN_FAILED",
-        [0x47] = "MC_EXCL_MODE_NO_PMREQ_CMP",
-        [0x48] = "MC_SVID_READ_REG_ICC_MAX_FAILED",
-        [0x49] = "MC_SVID_WRITE_REG_VOUT_MAX_FAILED",
-        [0x4B] = "MC_BOOT_VID_TIMEOUT_DRAM_0",
-        [0x4C] = "MC_BOOT_VID_TIMEOUT_DRAM_1",
-        [0x4D] = "MC_BOOT_VID_TIMEOUT_DRAM_2",
-        [0x4E] = "MC_BOOT_VID_TIMEOUT_DRAM_3",
-        [0x4F] = "MC_SVID_COMMAND_ERROR",
-        [0x52] = "MC_FIVR_CATAS_OVERVOL_FAULT",
-        [0x53] = "MC_FIVR_CATAS_OVERCUR_FAULT",
-        [0x57] = "MC_SVID_PKGC_REQUEST_FAILED",
-        [0x58] = "MC_SVID_IMON_REQUEST_FAILED",
-        [0x59] = "MC_SVID_ALERT_REQUEST_FAILED",
-        [0x60] = "MC_INVALID_PKGS_REQ_PCH",
-        [0x61] = "MC_INVALID_PKGS_REQ_QPI",
-        [0x62] = "MC_INVALID_PKGS_RSP_QPI",
-        [0x63] = "MC_INVALID_PKGS_RSP_PCH",
-        [0x64] = "MC_INVALID_PKG_STATE_CONFIG",
-        [0x67] = "MC_HA_IMC_RW_BLOCK_ACK_TIMEOUT",
-        [0x68] = "MC_IMC_RW_SMBUS_TIMEOUT",
-        [0x69] = "MC_HA_FAILSTS_CHANGE_DETECTED",
-        [0x6A] = "MC_MSGCH_PMREQ_CMP_TIMEOUT",
-        [0x70] = "MC_WATCHDOG_TIMEOUT_PKGC_SLAVE",
-        [0x71] = "MC_WATCHDOG_TIMEOUT_PKGC_MASTER",
-        [0x72] = "MC_WATCHDOG_TIMEOUT_PKGS_MASTER",
-        [0x7C] = "MC_BIOS_RST_CPL_INVALID_SEQ",
-        [0x7D] = "MC_MORE_THAN_ONE_TXT_AGENT",
-        [0x81] = "MC_RECOVERABLE_DIE_THERMAL_TOO_HOT"
+       [0x00] = "No Error",
+       [0x09] = "MC_MESSAGE_CHANNEL_TIMEOUT",
+       [0x0D] = "MC_IMC_FORCE_SR_S3_TIMEOUT",
+       [0x0E] = "MC_CPD_UNCPD_SD_TIMEOUT",
+       [0x13] = "MC_DMI_TRAINING_TIMEOUT",
+       [0x15] = "MC_DMI_CPU_RESET_ACK_TIMEOUT",
+       [0x1E] = "MC_VR_ICC_MAX_LT_FUSED_ICC_MAX",
+       [0x25] = "MC_SVID_COMMAN_TIMEOUT",
+       [0x29] = "MC_VR_VOUT_MAC_LT_FUSED_SVID",
+       [0x2B] = "MC_PKGC_WATCHDOG_HANG_CBZ_DOWN",
+       [0x2C] = "MC_PKGC_WATCHDOG_HANG_CBZ_UP",
+       [0x39] = "MC_PKGC_WATCHDOG_HANG_C3_UP_SF",
+       [0x44] = "MC_CRITICAL_VR_FAILED",
+       [0x45] = "MC_ICC_MAX_NOTSUPPORTED",
+       [0x46] = "MC_VID_RAMP_DOWN_FAILED",
+       [0x47] = "MC_EXCL_MODE_NO_PMREQ_CMP",
+       [0x48] = "MC_SVID_READ_REG_ICC_MAX_FAILED",
+       [0x49] = "MC_SVID_WRITE_REG_VOUT_MAX_FAILED",
+       [0x4B] = "MC_BOOT_VID_TIMEOUT_DRAM_0",
+       [0x4C] = "MC_BOOT_VID_TIMEOUT_DRAM_1",
+       [0x4D] = "MC_BOOT_VID_TIMEOUT_DRAM_2",
+       [0x4E] = "MC_BOOT_VID_TIMEOUT_DRAM_3",
+       [0x4F] = "MC_SVID_COMMAND_ERROR",
+       [0x52] = "MC_FIVR_CATAS_OVERVOL_FAULT",
+       [0x53] = "MC_FIVR_CATAS_OVERCUR_FAULT",
+       [0x57] = "MC_SVID_PKGC_REQUEST_FAILED",
+       [0x58] = "MC_SVID_IMON_REQUEST_FAILED",
+       [0x59] = "MC_SVID_ALERT_REQUEST_FAILED",
+       [0x60] = "MC_INVALID_PKGS_REQ_PCH",
+       [0x61] = "MC_INVALID_PKGS_REQ_QPI",
+       [0x62] = "MC_INVALID_PKGS_RSP_QPI",
+       [0x63] = "MC_INVALID_PKGS_RSP_PCH",
+       [0x64] = "MC_INVALID_PKG_STATE_CONFIG",
+       [0x67] = "MC_HA_IMC_RW_BLOCK_ACK_TIMEOUT",
+       [0x68] = "MC_IMC_RW_SMBUS_TIMEOUT",
+       [0x69] = "MC_HA_FAILSTS_CHANGE_DETECTED",
+       [0x6A] = "MC_MSGCH_PMREQ_CMP_TIMEOUT",
+       [0x70] = "MC_WATCHDOG_TIMEOUT_PKGC_SLAVE",
+       [0x71] = "MC_WATCHDOG_TIMEOUT_PKGC_MASTER",
+       [0x72] = "MC_WATCHDOG_TIMEOUT_PKGS_MASTER",
+       [0x7C] = "MC_BIOS_RST_CPL_INVALID_SEQ",
+       [0x7D] = "MC_MORE_THAN_ONE_TXT_AGENT",
+       [0x81] = "MC_RECOVERABLE_DIE_THERMAL_TOO_HOT"
 };
 
 static struct field pcu_mc4[] = {
-        FIELD(24, pcu_1),
-        {}
+       FIELD(24, pcu_1),
+       {}
 };
 
 /* See IA32 SDM Vol3B Table 16-21 */
 
 static char *qpi[] = {
-        [0x02] = "Intel QPI physical layer detected drift buffer alarm",
-        [0x03] = "Intel QPI physical layer detected latency buffer rollover",
-        [0x10] = "Intel QPI link layer detected control error from R3QPI",
-        [0x11] = "Rx entered LLR abort state on CRC error",
-        [0x12] = "Unsupported or undefined packet",
-        [0x13] = "Intel QPI link layer control error",
-        [0x15] = "RBT used un-initialized value",
-        [0x20] = "Intel QPI physical layer detected a QPI in-band reset but aborted initialization",
-        [0x21] = "Link failover data self healing",
-        [0x22] = "Phy detected in-band reset (no width change)",
-        [0x23] = "Link failover clock failover",
-        [0x30] = "Rx detected CRC error - successful LLR after Phy re-init",
-        [0x31] = "Rx detected CRC error - successful LLR wihout Phy re-init",
+       [0x02] = "Intel QPI physical layer detected drift buffer alarm",
+       [0x03] = "Intel QPI physical layer detected latency buffer rollover",
+       [0x10] = "Intel QPI link layer detected control error from R3QPI",
+       [0x11] = "Rx entered LLR abort state on CRC error",
+       [0x12] = "Unsupported or undefined packet",
+       [0x13] = "Intel QPI link layer control error",
+       [0x15] = "RBT used un-initialized value",
+       [0x20] = "Intel QPI physical layer detected a QPI in-band reset but aborted initialization",
+       [0x21] = "Link failover data self healing",
+       [0x22] = "Phy detected in-band reset (no width change)",
+       [0x23] = "Link failover clock failover",
+       [0x30] = "Rx detected CRC error - successful LLR after Phy re-init",
+       [0x31] = "Rx detected CRC error - successful LLR wihout Phy re-init",
 };
 
 static struct field qpi_mc[] = {
-        FIELD(16, qpi),
-        {}
+       FIELD(16, qpi),
+       {}
 };
 
 /* See IA32 SDM Vol3B Table 16-22 */
 
 static struct field memctrl_mc9[] = {
-        SBITFIELD(16, "DDR3 address parity error"),
-        SBITFIELD(17, "Uncorrected HA write data error"),
-        SBITFIELD(18, "Uncorrected HA data byte enable error"),
-        SBITFIELD(19, "Corrected patrol scrub error"),
-        SBITFIELD(20, "Uncorrected patrol scrub error"),
-        SBITFIELD(21, "Corrected spare error"),
-        SBITFIELD(22, "Uncorrected spare error"),
-        SBITFIELD(23, "Corrected memory read error"),
-        SBITFIELD(24, "iMC write data buffer parity error"),
-        SBITFIELD(25, "DDR4 command address parity error"),
-        {}
+       SBITFIELD(16, "DDR3 address parity error"),
+       SBITFIELD(17, "Uncorrected HA write data error"),
+       SBITFIELD(18, "Uncorrected HA data byte enable error"),
+       SBITFIELD(19, "Corrected patrol scrub error"),
+       SBITFIELD(20, "Uncorrected patrol scrub error"),
+       SBITFIELD(21, "Corrected spare error"),
+       SBITFIELD(22, "Uncorrected spare error"),
+       SBITFIELD(23, "Corrected memory read error"),
+       SBITFIELD(24, "iMC write data buffer parity error"),
+       SBITFIELD(25, "DDR4 command address parity error"),
+       {}
 };
 
 void hsw_decode_model(struct ras_events *ras, struct mce_event *e)
@@ -122,33 +122,33 @@ void hsw_decode_model(struct ras_events *ras, struct mce_event *e)
        uint32_t mca = status & 0xffff;
        unsigned rank0 = -1, rank1 = -1, chan;
 
-        switch (e->bank) {
-        case 4:
-                switch (EXTRACT(status, 0, 15) & ~(1ull << 12)) {
-                case 0x402: case 0x403:
-                        mce_snprintf(e->mcastatus_msg, "PCU Internal Errors");
-                        break;
-                case 0x406:
-                        mce_snprintf(e->mcastatus_msg, "Intel TXT Errors");
-                        break;
-                case 0x407:
-                        mce_snprintf(e->mcastatus_msg, "Other UBOX Internal Errors");
-                        break;
-                }
-                if (EXTRACT(status, 16, 17) && !EXTRACT(status, 18, 19))
-                        mce_snprintf(e->error_msg, "PCU Internal error");
-                decode_bitfield(e, status, pcu_mc4);
-                break;
-        case 5:
-        case 20:
-        case 21:
-                decode_bitfield(e, status, qpi_mc);
-                break;
-        case 9: case 10: case 11: case 12:
-        case 13: case 14: case 15: case 16:
-                decode_bitfield(e, status, memctrl_mc9);
-                break;
-        }
+       switch (e->bank) {
+       case 4:
+               switch (EXTRACT(status, 0, 15) & ~(1ull << 12)) {
+               case 0x402: case 0x403:
+                       mce_snprintf(e->mcastatus_msg, "PCU Internal Errors");
+                       break;
+               case 0x406:
+                       mce_snprintf(e->mcastatus_msg, "Intel TXT Errors");
+                       break;
+               case 0x407:
+                       mce_snprintf(e->mcastatus_msg, "Other UBOX Internal Errors");
+                       break;
+               }
+               if (EXTRACT(status, 16, 17) && !EXTRACT(status, 18, 19))
+                       mce_snprintf(e->error_msg, "PCU Internal error");
+               decode_bitfield(e, status, pcu_mc4);
+               break;
+       case 5:
+       case 20:
+       case 21:
+               decode_bitfield(e, status, qpi_mc);
+               break;
+       case 9: case 10: case 11: case 12:
+       case 13: case 14: case 15: case 16:
+               decode_bitfield(e, status, memctrl_mc9);
+               break;
+       }
 
        /*
         * Memory error specific code. Returns if the error is not a MC one

diff --git a/ras-aer-handler.c b/ras-aer-handler.c
index 07cbeaa4536e56894e4461d7caceeb52a0cfef20..664f7b4aa2fcb8702eee7236dcc8990b67996a03 100644 (file)
--- a/ras-aer-handler.c
+++ b/ras-aer-handler.c
@@ -111,10 +111,10 @@ int ras_aer_event_handler(struct trace_seq *s,
        case HW_EVENT_AER_UNCORRECTED_NON_FATAL:
                ev.error_type = "Uncorrected (Non-Fatal)";
                break;
-        case HW_EVENT_AER_UNCORRECTED_FATAL:
+       case HW_EVENT_AER_UNCORRECTED_FATAL:
                ev.error_type = "Uncorrected (Fatal)";
                break;
-        case HW_EVENT_AER_CORRECTED:
+       case HW_EVENT_AER_CORRECTED:
                ev.error_type = "Corrected";
                break;
        default:

diff --git a/ras-diskerror-handler.c b/ras-diskerror-handler.c
index 490041c8e08e6f922383d73683c4bae5be342b47..271dfac82d3c869e336b562f4fdfd58d5b7d8397 100644 (file)
--- a/ras-diskerror-handler.c
+++ b/ras-diskerror-handler.c
@@ -35,19 +35,19 @@ static const struct {
        int             error;
        const char      *name;
 } blk_errors[] = {
-        { -EOPNOTSUPP, "operation not supported error" },
-        { -ETIMEDOUT, "timeout error" },
-        { -ENOSPC,    "critical space allocation error" },
-        { -ENOLINK,   "recoverable transport error" },
-        { -EREMOTEIO, "critical target error" },
-        { -EBADE,     "critical nexus error" },
-        { -ENODATA,   "critical medium error" },
-        { -EILSEQ,    "protection error" },
-        { -ENOMEM,    "kernel resource error" },
-        { -EBUSY,     "device resource error" },
-        { -EAGAIN,    "nonblocking retry error" },
-        { -EREMCHG, "dm internal retry error" },
-        { -EIO,       "I/O error" },
+       { -EOPNOTSUPP, "operation not supported error" },
+       { -ETIMEDOUT, "timeout error" },
+       { -ENOSPC,    "critical space allocation error" },
+       { -ENOLINK,   "recoverable transport error" },
+       { -EREMOTEIO, "critical target error" },
+       { -EBADE,     "critical nexus error" },
+       { -ENODATA,   "critical medium error" },
+       { -EILSEQ,    "protection error" },
+       { -ENOMEM,    "kernel resource error" },
+       { -EBUSY,     "device resource error" },
+       { -EAGAIN,    "nonblocking retry error" },
+       { -EREMCHG, "dm internal retry error" },
+       { -EIO,       "I/O error" },
 };
 
 #define ARRAY_SIZE(x) (sizeof(x)/sizeof(*(x)))

diff --git a/ras-events.c b/ras-events.c
index e31c998ae61f5cd0a77462203e06647a026f46e7..a63725ce451bbd7bb4690c7685601f0b8740d23e 100644 (file)
--- a/ras-events.c
+++ b/ras-events.c
@@ -754,23 +754,23 @@ int handle_ras_events(int record_events)
 #endif
 
 #ifdef HAVE_NON_STANDARD
-        rc = add_event_handler(ras, pevent, page_size, "ras", "non_standard_event",
-                               ras_non_standard_event_handler, NULL, NON_STANDARD_EVENT);
-        if (!rc)
-                num_events++;
-        else
-                log(ALL, LOG_ERR, "Can't get traces from %s:%s\n",
-                    "ras", "non_standard_event");
+       rc = add_event_handler(ras, pevent, page_size, "ras", "non_standard_event",
+                              ras_non_standard_event_handler, NULL, NON_STANDARD_EVENT);
+       if (!rc)
+               num_events++;
+       else
+               log(ALL, LOG_ERR, "Can't get traces from %s:%s\n",
+                   "ras", "non_standard_event");
 #endif
 
 #ifdef HAVE_ARM
-        rc = add_event_handler(ras, pevent, page_size, "ras", "arm_event",
-                               ras_arm_event_handler, NULL, ARM_EVENT);
-        if (!rc)
-                num_events++;
-        else
-                log(ALL, LOG_ERR, "Can't get traces from %s:%s\n",
-                    "ras", "arm_event");
+       rc = add_event_handler(ras, pevent, page_size, "ras", "arm_event",
+                              ras_arm_event_handler, NULL, ARM_EVENT);
+       if (!rc)
+               num_events++;
+       else
+               log(ALL, LOG_ERR, "Can't get traces from %s:%s\n",
+                   "ras", "arm_event");
 #endif
 
        cpus = get_num_cpus(ras);
@@ -782,7 +782,7 @@ int handle_ras_events(int record_events)
        if (ras->mce_priv) {
                rc = add_event_handler(ras, pevent, page_size,
                                       "mce", "mce_record",
-                                      ras_mce_event_handler, NULL, MCE_EVENT);
+                                      ras_mce_event_handler, NULL, MCE_EVENT);
                if (!rc)
                        num_events++;
        else
@@ -807,17 +807,17 @@ int handle_ras_events(int record_events)
        rc = add_event_handler(ras, pevent, page_size, "net",
                               "net_dev_xmit_timeout",
                               ras_net_xmit_timeout_handler, NULL, DEVLINK_EVENT);
-        if (!rc)
+       if (!rc)
                filter_str = "devlink/devlink_health_report:msg=~\'TX timeout*\'";
 
        rc = add_event_handler(ras, pevent, page_size, "devlink",
                               "devlink_health_report",
                               ras_devlink_event_handler, filter_str, DEVLINK_EVENT);
-        if (!rc)
-                num_events++;
-        else
-                log(ALL, LOG_ERR, "Can't get traces from %s:%s\n",
-                    "devlink", "devlink_health_report");
+       if (!rc)
+               num_events++;
+       else
+               log(ALL, LOG_ERR, "Can't get traces from %s:%s\n",
+                   "devlink", "devlink_health_report");
 #endif
 
 #ifdef HAVE_DISKERROR