drm/i915: Restore GT coarse power gating workaround

The workaround to disable coarse power gating is still needed on SKL
GT3/GT4 machines and since the RC6 context corruption was discovered by
the hardware team also on all GEN9 machines. Restore applying the
workaround.

Fixes: c113236718e8 ("drm/i915: Extract GT render sleep (rc6) management")
Testcase: igt/intel_gt_pm_late_selftests/live_rc6_ctx
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Andi Shyti <andi.shyti@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20191114152621.7235-1-imre.deak@intel.com

diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c
index 5e3ba034bd461fd5e93e2bf9107bdcf76ba775f7..7c0d9eb5c6fc6b8b52843ccfcc1322ad8b85478c 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_rc6.c
+++ b/drivers/gpu/drm/i915/gt/intel_rc6.c
@@ -175,8 +175,13 @@ static void gen9_rc6_enable(struct intel_rc6 *rc6)
            GEN6_RC_CTL_RC6_ENABLE |
            rc6_mode);
 
-       set(uncore, GEN9_PG_ENABLE,
-           GEN9_RENDER_PG_ENABLE | GEN9_MEDIA_PG_ENABLE);
+       /*
+        * WaRsDisableCoarsePowerGating:skl,cnl
+        *   - Render/Media PG need to be disabled with RC6.
+        */
+       if (!NEEDS_WaRsDisableCoarsePowerGating(rc6_to_i915(rc6)))
+               set(uncore, GEN9_PG_ENABLE,
+                   GEN9_RENDER_PG_ENABLE | GEN9_MEDIA_PG_ENABLE);
 }
 
 static void gen8_rc6_enable(struct intel_rc6 *rc6)