Merge tag 'riscv-for-linus-6.12-mw1' of git://git.kernel.org/pub/scm/linux/kernel...

Pull RISC-V updates from Palmer Dabbelt:

 - Support using Zkr to seed KASLR

 - Support IPI-triggered CPU backtracing

 - Support for generic CPU vulnerabilities reporting to userspace

 - A few cleanups for missing licenses

 - The size limit on the XIP kernel has been removed

 - Support for tracing userspace stacks

 - Support for the Svvptc extension

 - Various cleanups and fixes throughout the tree

* tag 'riscv-for-linus-6.12-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (47 commits)
  crash: Fix riscv64 crash memory reserve dead loop
  perf/riscv-sbi: Add platform specific firmware event handling
  tools: Optimize ring buffer for riscv
  tools: Add riscv barrier implementation
  RISC-V: Don't have MAX_PHYSMEM_BITS exceed phys_addr_t
  ACPI: NUMA: initialize all values of acpi_early_node_map to NUMA_NO_NODE
  riscv: Enable bitops instrumentation
  riscv: Omit optimized string routines when using KASAN
  ACPI: RISCV: Make acpi_numa_get_nid() to be static
  riscv: Randomize lower bits of stack address
  selftests: riscv: Allow mmap test to compile on 32-bit
  riscv: Make riscv_isa_vendor_ext_andes array static
  riscv: Use LIST_HEAD() to simplify code
  riscv: defconfig: Disable RZ/Five peripheral support
  RISC-V: Implement kgdb_roundup_cpus() to enable future NMI Roundup
  riscv: avoid Imbalance in RAS
  riscv: cacheinfo: Add back init_cache_level() function
  riscv: Remove unused _TIF_WORK_MASK
  drivers/perf: riscv: Remove redundant macro check
  riscv: define ILLEGAL_POINTER_VALUE for 64bit
  ...

diff --cc arch/riscv/Kconfig
Simple merge

diff --cc arch/riscv/configs/defconfig
index 572eac58f33bd112aa53f8e6b130348d4fb95d8d,b51ef6cd1e3986ed5bbb322548f2af09298ecb79..2341393cfac1ae9afcd5de61c2ffb735deb53605
--- 1/arch/riscv/configs/defconfig
--- 2/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@@ -157,10 -154,8 +154,9 @@@ CONFIG_HW_RANDOM_VIRTIO=
  CONFIG_HW_RANDOM_JH7110=m
  CONFIG_I2C=y
  CONFIG_I2C_CHARDEV=m
 +CONFIG_I2C_DESIGNWARE_CORE=y
  CONFIG_I2C_DESIGNWARE_PLATFORM=y
  CONFIG_I2C_MV64XXX=m
- CONFIG_I2C_RIIC=y
  CONFIG_SPI=y
  CONFIG_SPI_CADENCE_QUADSPI=m
  CONFIG_SPI_PL022=m
@@@ -254,11 -241,7 +246,10 @@@ CONFIG_VIRTIO_BALLOON=
  CONFIG_VIRTIO_INPUT=y
  CONFIG_VIRTIO_MMIO=y
  CONFIG_CLK_SOPHGO_CV1800=y
 +CONFIG_CLK_SOPHGO_SG2042_PLL=y
 +CONFIG_CLK_SOPHGO_SG2042_CLKGEN=y
 +CONFIG_CLK_SOPHGO_SG2042_RPGATE=y
  CONFIG_SUN8I_DE2_CCU=m
- CONFIG_RENESAS_OSTM=y
  CONFIG_SUN50I_IOMMU=y
  CONFIG_RPMSG_CHAR=y
  CONFIG_RPMSG_CTRL=y

diff --cc arch/riscv/include/asm/irq.h
index 7e9a84a005edffa41dfb08e003ff0bfa4980d819,8330d16b05b5e42046e4b4a165c7f067f526ff68..7b038f3b7cb0b7d3348c18e79a6f658d4ced7560
--- 1/arch/riscv/include/asm/irq.h
--- 2/arch/riscv/include/asm/irq.h
+++ b/arch/riscv/include/asm/irq.h
@@@ -12,8 -12,11 +12,13 @@@
  
  #include <asm-generic/irq.h>
  
 +#define INVALID_CONTEXT UINT_MAX
 +
+ #ifdef CONFIG_SMP
+ void arch_trigger_cpumask_backtrace(const cpumask_t *mask, int exclude_cpu);
+ #define arch_trigger_cpumask_backtrace arch_trigger_cpumask_backtrace
+ #endif
+ 
  void riscv_set_intc_hwnode_fn(struct fwnode_handle *(*fn)(void));
  
  struct fwnode_handle *riscv_get_intc_hwnode(void);

diff --cc arch/riscv/include/asm/sbi.h
Simple merge

diff --cc arch/riscv/mm/init.c
Simple merge

diff --cc drivers/perf/riscv_pmu_sbi.c
Simple merge