arm64: dts: imx8mp-phycore-som: Reduce drive strength for fec tx lines

Reduce drive strength on fec tx lines for signal quality improvements.
Measurements showed that TD0 and TD1 require X4 and the other lines
X2 for optimized settings.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
index 927290990d0277d7b981e753a001b51a7a62a57d..06e94f6e17023603e42635090deb77e9da134300 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
@@ -222,12 +222,12 @@
                        MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3         0x91
                        MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC          0x91
                        MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL      0x91
-                       MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0         0x1f
-                       MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1         0x1f
-                       MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2         0x1f
-                       MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3         0x1f
-                       MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL      0x1f
-                       MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC         0x1f
+                       MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0         0x12
+                       MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1         0x12
+                       MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2         0x14
+                       MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3         0x14
+                       MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL      0x14
+                       MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC         0x14
                        MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15             0x11
                >;
        };