iommus = <&ipmmu_vi1 25>;
                };
 
+               vspx0: vsp@fedd0000 {
+                       compatible = "renesas,vsp2";
+                       reg = <0 0xfedd0000 0 0x8000>;
+                       interrupts = <GIC_SPI 556 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 1028>;
+                       power-domains = <&sysc R8A779G0_PD_A3ISP0>;
+                       resets = <&cpg 1028>;
+
+                       renesas,fcp = <&fcpvx0>;
+               };
+
+               vspx1: vsp@fedd8000 {
+                       compatible = "renesas,vsp2";
+                       reg = <0 0xfedd8000 0 0x8000>;
+                       interrupts = <GIC_SPI 557 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 1029>;
+                       power-domains = <&sysc R8A779G0_PD_A3ISP1>;
+                       resets = <&cpg 1029>;
+
+                       renesas,fcp = <&fcpvx1>;
+               };
+
                prr: chipid@fff00044 {
                        compatible = "renesas,prr";
                        reg = <0 0xfff00044 0 4>;