]> www.infradead.org Git - users/dwmw2/linux.git/commitdiff
net: ethernet: ti: am65-cpsw: Enable USXGMII mode for J7200 CPSW5G
authorSiddharth Vadapalli <s-vadapalli@ti.com>
Thu, 10 Oct 2024 15:05:43 +0000 (20:35 +0530)
committerPaolo Abeni <pabeni@redhat.com>
Tue, 15 Oct 2024 10:43:59 +0000 (12:43 +0200)
TI's J7200 SoC supports USXGMII mode. Add USXGMII mode to the
extra_modes member of the J7200 SoC data.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://patch.msgid.link/20241010150543.2620448-1-s-vadapalli@ti.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
drivers/net/ethernet/ti/am65-cpsw-nuss.c

index cda7ddfe684586191e90bb77237ddc40f5d4fb3d..acaf06b274cac9e04766fcddb135e24229a2eb0e 100644 (file)
@@ -3372,7 +3372,8 @@ static const struct am65_cpsw_pdata j7200_cpswxg_pdata = {
        .quirks = 0,
        .ale_dev_id = "am64-cpswxg",
        .fdqring_mode = K3_RINGACC_RING_MODE_RING,
-       .extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII),
+       .extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII) |
+                      BIT(PHY_INTERFACE_MODE_USXGMII),
 };
 
 static const struct am65_cpsw_pdata j721e_cpswxg_pdata = {