]> www.infradead.org Git - linux.git/commitdiff
arm64: dts: qcom: sa8775p-ride: Enable Display Port
authorSoutrik Mukhopadhyay <quic_mukhopad@quicinc.com>
Mon, 25 Nov 2024 10:57:47 +0000 (16:27 +0530)
committerBjorn Andersson <andersson@kernel.org>
Thu, 26 Dec 2024 05:50:49 +0000 (23:50 -0600)
The Qualcomm SA8775P platform comes with 2 DisplayPort controllers
for each mdss. edp0 and edp1 correspond to the DP controllers of
mdss0, whereas edp2 and edp3 correspond to the DP controllers of
mdss1. This change enables only the DP controllers, DPTX0 and DPTX1
alongside their corresponding PHYs of mdss0, which have been
validated.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241125105747.6595-3-quic_mukhopad@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi

index db03e04ad9d56fde400ebf29887b95fbcf6140c3..175f8b1e3b2ded15fc3265ac8c26b14473b618f6 100644 (file)
                        };
                };
        };
+
+       dp0-connector {
+               compatible = "dp-connector";
+               label = "eDP0";
+               type = "full-size";
+
+               port {
+                       dp0_connector_in: endpoint {
+                               remote-endpoint = <&mdss0_dp0_out>;
+                       };
+               };
+       };
+
+       dp1-connector {
+               compatible = "dp-connector";
+               label = "eDP1";
+               type = "full-size";
+
+               port {
+                       dp1_connector_in: endpoint {
+                               remote-endpoint = <&mdss0_dp1_out>;
+                       };
+               };
+       };
 };
 
 &apps_rsc {
        status = "okay";
 };
 
+&mdss0 {
+       status = "okay";
+};
+
+&mdss0_dp0 {
+       pinctrl-0 = <&dp0_hot_plug_det>;
+       pinctrl-names = "default";
+
+       status = "okay";
+};
+
+&mdss0_dp0_out {
+       data-lanes = <0 1 2 3>;
+       link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
+       remote-endpoint = <&dp0_connector_in>;
+};
+
+&mdss0_dp0_phy {
+       vdda-phy-supply = <&vreg_l1c>;
+       vdda-pll-supply = <&vreg_l4a>;
+
+       status = "okay";
+};
+
+&mdss0_dp1 {
+       pinctrl-0 = <&dp1_hot_plug_det>;
+       pinctrl-names = "default";
+
+       status = "okay";
+};
+
+&mdss0_dp1_out {
+       data-lanes = <0 1 2 3>;
+       link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
+       remote-endpoint = <&dp1_connector_in>;
+};
+
+&mdss0_dp1_phy {
+       vdda-phy-supply = <&vreg_l1c>;
+       vdda-pll-supply = <&vreg_l4a>;
+
+       status = "okay";
+};
+
 &pmm8654au_0_gpios {
        gpio-line-names = "DS_EN",
                          "POFF_COMPLETE",
 };
 
 &tlmm {
+       dp0_hot_plug_det: dp0-hot-plug-det-state {
+               pins = "gpio101";
+               function = "edp0_hot";
+               bias-disable;
+       };
+
+       dp1_hot_plug_det: dp1-hot-plug-det-state {
+               pins = "gpio102";
+               function = "edp1_hot";
+               bias-disable;
+       };
+
        ethernet0_default: ethernet0-default-state {
                ethernet0_mdc: ethernet0-mdc-pins {
                        pins = "gpio8";