arm64: fix el2_setup check of CurrentEL

The CurrentEL system register reports the Current Exception Level
of the CPU. It doesn't say anything about the stack handling, and
yet we compare it to PSR_MODE_EL2t and PSR_MODE_EL2h.

It works by chance because PSR_MODE_EL2t happens to match the right
bits, but that's otherwise a very bad idea. Just check for the EL
value instead.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
[catalin.marinas@arm.com: fixed arch/arm64/kernel/efi-entry.S]
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h
index a429b5940be2e614a8149fcc7c7acac9d2b4fad0..501000fadb6fde2249096d3dc6ee027cba427e14 100644 (file)
--- a/arch/arm64/include/asm/ptrace.h
+++ b/arch/arm64/include/asm/ptrace.h
@@ -21,6 +21,10 @@
 
 #include <uapi/asm/ptrace.h>
 
+/* Current Exception Level values, as contained in CurrentEL */
+#define CurrentEL_EL1          (1 << 2)
+#define CurrentEL_EL2          (2 << 2)
+
 /* AArch32-specific ptrace requests */
 #define COMPAT_PTRACE_GETREGS          12
 #define COMPAT_PTRACE_SETREGS          13

diff --git a/arch/arm64/kernel/efi-entry.S b/arch/arm64/kernel/efi-entry.S
index 66716c9b9e5fe893dd4d8218291f71f8fe8a24a6..619b1dd7bcdea70e184daacbfb5dd7797c8460c0 100644 (file)
--- a/arch/arm64/kernel/efi-entry.S
+++ b/arch/arm64/kernel/efi-entry.S
@@ -78,8 +78,7 @@ ENTRY(efi_stub_entry)
 
        /* Turn off Dcache and MMU */
        mrs     x0, CurrentEL
-       cmp     x0, #PSR_MODE_EL2t
-       ccmp    x0, #PSR_MODE_EL2h, #0x4, ne
+       cmp     x0, #CurrentEL_EL2
        b.ne    1f
        mrs     x0, sctlr_el2
        bic     x0, x0, #1 << 0 // clear SCTLR.M

diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index a96d3a6a63f6a526029d0b825de18f1ffc72f9cb..a2c1195abb7f70b6633148568ca0ae830c0415db 100644 (file)
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -270,8 +270,7 @@ ENDPROC(stext)
  */
 ENTRY(el2_setup)
        mrs     x0, CurrentEL
-       cmp     x0, #PSR_MODE_EL2t
-       ccmp    x0, #PSR_MODE_EL2h, #0x4, ne
+       cmp     x0, #CurrentEL_EL2
        b.ne    1f
        mrs     x0, sctlr_el2
 CPU_BE(        orr     x0, x0, #(1 << 25)      )       // Set the EE bit for EL2