ASoC: nau8822: add speaker Bridge Tied Output configuration

Allow configuring the two loudspeaker outputs as a
single Bridge Tied Load output getting higher output power.

Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20230104140412.35575-4-francesco@dolcini.it
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/sound/soc/codecs/nau8822.c b/sound/soc/codecs/nau8822.c
index 1aef281a997271d7cb6f488bbfdc65cd45df939b..d5006d8de639551473f8f7f8fc097eecdfe06588 100644 (file)
--- a/sound/soc/codecs/nau8822.c
+++ b/sound/soc/codecs/nau8822.c
@@ -1056,6 +1056,7 @@ static const int update_reg[] = {
 static int nau8822_probe(struct snd_soc_component *component)
 {
        int i;
+       struct device_node *of_node = component->dev->of_node;
 
        /*
         * Set the update bit in all registers, that have one. This way all
@@ -1066,6 +1067,14 @@ static int nau8822_probe(struct snd_soc_component *component)
                snd_soc_component_update_bits(component,
                        update_reg[i], 0x100, 0x100);
 
+       /* Check property to configure the two loudspeaker outputs as
+        * a single Bridge Tied Load output
+        */
+       if (of_property_read_bool(of_node, "nuvoton,spk-btl"))
+               snd_soc_component_update_bits(component,
+                                             NAU8822_REG_RIGHT_SPEAKER_CONTROL,
+                                             NAU8822_RSUBBYP, NAU8822_RSUBBYP);
+
        return 0;
 }
 

diff --git a/sound/soc/codecs/nau8822.h b/sound/soc/codecs/nau8822.h
index 547ec057f853b38a7250a5714e62002bb9fd6fa8..646f6bb64bc5b5348e0f0dbaf28f233fef6e3bb0 100644 (file)
--- a/sound/soc/codecs/nau8822.h
+++ b/sound/soc/codecs/nau8822.h
@@ -187,6 +187,15 @@
 /* NAU8822_REG_PLL_K3 (0x27) */
 #define NAU8822_PLLK3_MASK                     0x1FF
 
+/* NAU8822_REG_RIGHT_SPEAKER_CONTROL (0x2B) */
+#define NAU8822_RMIXMUT                                0x20
+#define NAU8822_RSUBBYP                                0x10
+
+#define NAU8822_RAUXRSUBG_SFT                  1
+#define NAU8822_RAUXRSUBG_MASK                 0x0E
+
+#define NAU8822_RAUXSMUT                       0x01
+
 /* System Clock Source */
 enum {
        NAU8822_CLK_MCLK,