]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
i40e: Refactor force_wb and WB_ON_ITR functionality code
authorAnjali Singhai Jain <anjali.singhai@intel.com>
Thu, 14 Jan 2016 00:51:43 +0000 (16:51 -0800)
committerChuck Anderson <chuck.anderson@oracle.com>
Thu, 10 Mar 2016 16:37:19 +0000 (08:37 -0800)
Orabug: 22342532

Now that the Force-WriteBack functionality in X710/XL710 devices
has been moved out of the clean routine and into the service task,
we need to make sure WriteBack-On-ITR is separated out since it
is still called from clean.

In the X722 devices, Force-WriteBack implies WriteBack-On-ITR but
without the interrupt, which put the driver into a missed
interrupt scenario and a potential tx-timeout report.

With this patch, we break the two functions out, and call the
appropriate ones at the right place. This will avoid creating missed
interrupt like scenarios for X722 devices.

Also update copyright year in file headers.

Change-ID: Iacbde39f95f332f82be8736864675052c3583a40
Signed-off-by: Anjali Singhai Jain <anjali.singhai@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
(cherry picked from commit ecc6a239e8dd233951bd3337f34d9ba4c46720c9)
Signed-off-by: Brian Maly <brian.maly@oracle.com>
drivers/net/ethernet/intel/i40e/i40e_txrx.c
drivers/net/ethernet/intel/i40evf/i40e_txrx.c
drivers/net/ethernet/intel/i40evf/i40e_txrx.h

index 8e4ba11dee882d3a895d40547d579f1c006e76dd..be741e69a6dd7f603705e23cc48c28b7cb35791a 100644 (file)
@@ -1,7 +1,7 @@
 /*******************************************************************************
  *
  * Intel Ethernet Controller XL710 Family Linux Driver
- * Copyright(c) 2013 - 2014 Intel Corporation.
+ * Copyright(c) 2013 - 2016 Intel Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -774,37 +774,48 @@ static bool i40e_clean_tx_irq(struct i40e_ring *tx_ring, int budget)
 }
 
 /**
- * i40e_force_wb - Arm hardware to do a wb on noncache aligned descriptors
+ * i40e_enable_wb_on_itr - Arm hardware to do a wb, interrupts are not enabled
  * @vsi: the VSI we care about
- * @q_vector: the vector  on which to force writeback
+ * @q_vector: the vector on which to enable writeback
  *
  **/
-void i40e_force_wb(struct i40e_vsi *vsi, struct i40e_q_vector *q_vector)
+static void i40e_enable_wb_on_itr(struct i40e_vsi *vsi,
+                                 struct i40e_q_vector *q_vector)
 {
        u16 flags = q_vector->tx.ring[0].flags;
+       u32 val;
 
-       if (flags & I40E_TXR_FLAGS_WB_ON_ITR) {
-               u32 val;
+       if (!(flags & I40E_TXR_FLAGS_WB_ON_ITR))
+               return;
 
-               if (q_vector->arm_wb_state)
-                       return;
+       if (q_vector->arm_wb_state)
+               return;
 
-               if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
-                       val = I40E_PFINT_DYN_CTLN_WB_ON_ITR_MASK |
-                             I40E_PFINT_DYN_CTLN_ITR_INDX_MASK; /* set noitr */
+       if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
+               val = I40E_PFINT_DYN_CTLN_WB_ON_ITR_MASK |
+                     I40E_PFINT_DYN_CTLN_ITR_INDX_MASK; /* set noitr */
 
-                       wr32(&vsi->back->hw,
-                            I40E_PFINT_DYN_CTLN(q_vector->v_idx +
-                                                vsi->base_vector - 1),
-                            val);
-               } else {
-                       val = I40E_PFINT_DYN_CTL0_WB_ON_ITR_MASK |
-                             I40E_PFINT_DYN_CTL0_ITR_INDX_MASK; /* set noitr */
+               wr32(&vsi->back->hw,
+                    I40E_PFINT_DYN_CTLN(q_vector->v_idx + vsi->base_vector - 1),
+                    val);
+       } else {
+               val = I40E_PFINT_DYN_CTL0_WB_ON_ITR_MASK |
+                     I40E_PFINT_DYN_CTL0_ITR_INDX_MASK; /* set noitr */
 
-                       wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0, val);
-               }
-               q_vector->arm_wb_state = true;
-       } else if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
+               wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0, val);
+       }
+       q_vector->arm_wb_state = true;
+}
+
+/**
+ * i40e_force_wb - Issue SW Interrupt so HW does a wb
+ * @vsi: the VSI we care about
+ * @q_vector: the vector  on which to force writeback
+ *
+ **/
+void i40e_force_wb(struct i40e_vsi *vsi, struct i40e_q_vector *q_vector)
+{
+       if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
                u32 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
                          I40E_PFINT_DYN_CTLN_ITR_INDX_MASK | /* set noitr */
                          I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK |
@@ -1945,7 +1956,7 @@ int i40e_napi_poll(struct napi_struct *napi, int budget)
 tx_only:
                if (arm_wb) {
                        q_vector->tx.ring[0].tx_stats.tx_force_wb++;
-                       i40e_force_wb(vsi, q_vector);
+                       i40e_enable_wb_on_itr(vsi, q_vector);
                }
                return budget;
        }
index 3d8f390e594fced64044fed13d75225af1e132e4..f6c4c88590173be4979f811f6220a034a4639c2b 100644 (file)
@@ -1,7 +1,7 @@
 /*******************************************************************************
  *
  * Intel Ethernet Controller XL710 Family Linux Virtual Function Driver
- * Copyright(c) 2013 - 2014 Intel Corporation.
+ * Copyright(c) 2013 - 2016 Intel Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -292,40 +292,49 @@ static bool i40e_clean_tx_irq(struct i40e_ring *tx_ring, int budget)
 }
 
 /**
- * i40evf_force_wb -Arm hardware to do a wb on noncache aligned descriptors
+ * i40evf_enable_wb_on_itr - Arm hardware to do a wb, interrupts are not enabled
  * @vsi: the VSI we care about
- * @q_vector: the vector  on which to force writeback
+ * @q_vector: the vector on which to enable writeback
  *
  **/
-static void i40evf_force_wb(struct i40e_vsi *vsi, struct i40e_q_vector *q_vector)
+static void i40e_enable_wb_on_itr(struct i40e_vsi *vsi,
+                                 struct i40e_q_vector *q_vector)
 {
        u16 flags = q_vector->tx.ring[0].flags;
+       u32 val;
 
-       if (flags & I40E_TXR_FLAGS_WB_ON_ITR) {
-               u32 val;
+       if (!(flags & I40E_TXR_FLAGS_WB_ON_ITR))
+               return;
 
-               if (q_vector->arm_wb_state)
-                       return;
+       if (q_vector->arm_wb_state)
+               return;
 
-               val = I40E_VFINT_DYN_CTLN1_WB_ON_ITR_MASK |
-                     I40E_VFINT_DYN_CTLN1_ITR_INDX_MASK; /* set noitr */
+       val = I40E_VFINT_DYN_CTLN1_WB_ON_ITR_MASK |
+             I40E_VFINT_DYN_CTLN1_ITR_INDX_MASK; /* set noitr */
 
-               wr32(&vsi->back->hw,
-                    I40E_VFINT_DYN_CTLN1(q_vector->v_idx +
-                                         vsi->base_vector - 1),
-                    val);
-               q_vector->arm_wb_state = true;
-       } else {
-               u32 val = I40E_VFINT_DYN_CTLN1_INTENA_MASK |
-                         I40E_VFINT_DYN_CTLN1_ITR_INDX_MASK | /* set noitr */
-                         I40E_VFINT_DYN_CTLN1_SWINT_TRIG_MASK |
-                         I40E_VFINT_DYN_CTLN1_SW_ITR_INDX_ENA_MASK;
-                         /* allow 00 to be written to the index */
-
-               wr32(&vsi->back->hw,
-                    I40E_VFINT_DYN_CTLN1(q_vector->v_idx +
-                                         vsi->base_vector - 1), val);
-       }
+       wr32(&vsi->back->hw,
+            I40E_VFINT_DYN_CTLN1(q_vector->v_idx +
+                                 vsi->base_vector - 1), val);
+       q_vector->arm_wb_state = true;
+}
+
+/**
+ * i40evf_force_wb - Issue SW Interrupt so HW does a wb
+ * @vsi: the VSI we care about
+ * @q_vector: the vector  on which to force writeback
+ *
+ **/
+void i40evf_force_wb(struct i40e_vsi *vsi, struct i40e_q_vector *q_vector)
+{
+       u32 val = I40E_VFINT_DYN_CTLN1_INTENA_MASK |
+                 I40E_VFINT_DYN_CTLN1_ITR_INDX_MASK | /* set noitr */
+                 I40E_VFINT_DYN_CTLN1_SWINT_TRIG_MASK |
+                 I40E_VFINT_DYN_CTLN1_SW_ITR_INDX_ENA_MASK
+                 /* allow 00 to be written to the index */;
+
+       wr32(&vsi->back->hw,
+            I40E_VFINT_DYN_CTLN1(q_vector->v_idx + vsi->base_vector - 1),
+            val);
 }
 
 /**
@@ -1383,7 +1392,7 @@ int i40evf_napi_poll(struct napi_struct *napi, int budget)
 tx_only:
                if (arm_wb) {
                        q_vector->tx.ring[0].tx_stats.tx_force_wb++;
-                       i40evf_force_wb(vsi, q_vector);
+                       i40e_enable_wb_on_itr(vsi, q_vector);
                }
                return budget;
        }
index e29bb3e86cfdc86378c5e924e6ed531f68979250..da701c56eaa22f853d5644bc8ad969748044cffd 100644 (file)
@@ -1,7 +1,7 @@
 /*******************************************************************************
  *
  * Intel Ethernet Controller XL710 Family Linux Virtual Function Driver
- * Copyright(c) 2013 - 2014 Intel Corporation.
+ * Copyright(c) 2013 - 2016 Intel Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -324,6 +324,7 @@ int i40evf_setup_rx_descriptors(struct i40e_ring *rx_ring);
 void i40evf_free_tx_resources(struct i40e_ring *tx_ring);
 void i40evf_free_rx_resources(struct i40e_ring *rx_ring);
 int i40evf_napi_poll(struct napi_struct *napi, int budget);
+void i40evf_force_wb(struct i40e_vsi *vsi, struct i40e_q_vector *q_vector);
 u32 i40evf_get_tx_pending(struct i40e_ring *ring);
 
 /**