ice: use read_poll_timeout_atomic in ice_read_phy_tstamp_ll_e810

The ice_read_phy_tstamp_ll_e810 function repeatedly reads the PF_SB_ATQBAL
register until the TS_LL_READ_TS bit is cleared. This is a perfect
candidate for using rd32_poll_timeout. However, the default implementation
uses a sleep-based wait. Use read_poll_timeout_atomic macro which is based
on the non-sleeping implementation and use it to replace the loop reading
in the ice_read_phy_tstamp_ll_e810 function.

Co-developed-by: Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Anton Nadezhdin <anton.nadezhdin@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>

diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
index 6f9d4dc82997d973b7f78f811bdaabc3caff1718..0c1c691f51d59856c259c5cb4fcd2a92b2e5d851 100644 (file)
--- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
@@ -4858,32 +4858,29 @@ static int
 ice_read_phy_tstamp_ll_e810(struct ice_hw *hw, u8 idx, u8 *hi, u32 *lo)
 {
        u32 val;
-       u8 i;
+       int err;
 
        /* Write TS index to read to the PF register so the FW can read it */
        val = FIELD_PREP(TS_LL_READ_TS_IDX, idx) | TS_LL_READ_TS;
        wr32(hw, PF_SB_ATQBAL, val);
 
        /* Read the register repeatedly until the FW provides us the TS */
-       for (i = TS_LL_READ_RETRIES; i > 0; i--) {
-               val = rd32(hw, PF_SB_ATQBAL);
-
-               /* When the bit is cleared, the TS is ready in the register */
-               if (!(FIELD_GET(TS_LL_READ_TS, val))) {
-                       /* High 8 bit value of the TS is on the bits 16:23 */
-                       *hi = FIELD_GET(TS_LL_READ_TS_HIGH, val);
+       err = read_poll_timeout_atomic(rd32, val,
+                                      !FIELD_GET(TS_LL_READ_TS, val), 10,
+                                      TS_LL_READ_TIMEOUT, false, hw,
+                                      PF_SB_ATQBAL);
+       if (err) {
+               ice_debug(hw, ICE_DBG_PTP, "Failed to read PTP timestamp using low latency read\n");
+               return err;
+       }
 
-                       /* Read the low 32 bit value and set the TS valid bit */
-                       *lo = rd32(hw, PF_SB_ATQBAH) | TS_VALID;
-                       return 0;
-               }
+       /* High 8 bit value of the TS is on the bits 16:23 */
+       *hi = FIELD_GET(TS_LL_READ_TS_HIGH, val);
 
-               udelay(10);
-       }
+       /* Read the low 32 bit value and set the TS valid bit */
+       *lo = rd32(hw, PF_SB_ATQBAH) | TS_VALID;
 
-       /* FW failed to provide the TS in time */
-       ice_debug(hw, ICE_DBG_PTP, "Failed to read PTP timestamp using low latency read\n");
-       return -EINVAL;
+       return 0;
 }
 
 /**

diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h
index 1cee0f1bba2df3af2ab8f0ad448a96cc6fe7ab8e..7a29faa593cc435eb98712845a56ad61766eb8d9 100644 (file)
--- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h
+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h
@@ -689,7 +689,7 @@ static inline bool ice_is_dual(struct ice_hw *hw)
 #define BYTES_PER_IDX_ADDR_L           4
 
 /* Tx timestamp low latency read definitions */
-#define TS_LL_READ_RETRIES             200
+#define TS_LL_READ_TIMEOUT             2000
 #define TS_LL_READ_TS_HIGH             GENMASK(23, 16)
 #define TS_LL_READ_TS_IDX              GENMASK(29, 24)
 #define TS_LL_READ_TS_INTR             BIT(30)