crypto: qat - abstract build ring base

Abstract the implementation of BUILD_RING_BASE_ADDR.

This is in preparation for the introduction of the qat_4xxx driver since
the value of the ring base differs between QAT GEN2 and QAT GEN4
devices.

Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Reviewed-by: Wojciech Ziemba <wojciech.ziemba@intel.com>
Reviewed-by: Maksim Lukoshkov <maksim.lukoshkov@intel.com>
Reviewed-by: Fiona Trahe <fiona.trahe@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

diff --git a/drivers/crypto/qat/qat_common/adf_accel_devices.h b/drivers/crypto/qat/qat_common/adf_accel_devices.h
index 692e39e5e8783063878b727024031ef9263aadc3..1fd32c56b119eb1d14495c548897ab4c4f1e3cbd 100644 (file)
--- a/drivers/crypto/qat/qat_common/adf_accel_devices.h
+++ b/drivers/crypto/qat/qat_common/adf_accel_devices.h
@@ -110,6 +110,7 @@ struct admin_info {
 };
 
 struct adf_hw_csr_ops {
+       u64 (*build_csr_ring_base_addr)(dma_addr_t addr, u32 size);
        u32 (*read_csr_ring_head)(void __iomem *csr_base_addr, u32 bank,
                                  u32 ring);
        void (*write_csr_ring_head)(void __iomem *csr_base_addr, u32 bank,

diff --git a/drivers/crypto/qat/qat_common/adf_gen2_hw_data.c b/drivers/crypto/qat/qat_common/adf_gen2_hw_data.c
index d5560e714167222e526a8a57181201b3124a9344..5de359165ab481e4874907bc954d719e56492aa0 100644 (file)
--- a/drivers/crypto/qat/qat_common/adf_gen2_hw_data.c
+++ b/drivers/crypto/qat/qat_common/adf_gen2_hw_data.c
@@ -55,6 +55,11 @@ void adf_gen2_get_arb_info(struct arb_info *arb_info)
 }
 EXPORT_SYMBOL_GPL(adf_gen2_get_arb_info);
 
+static u64 build_csr_ring_base_addr(dma_addr_t addr, u32 size)
+{
+       return BUILD_RING_BASE_ADDR(addr, size);
+}
+
 static u32 read_csr_ring_head(void __iomem *csr_base_addr, u32 bank, u32 ring)
 {
        return READ_CSR_RING_HEAD(csr_base_addr, bank, ring);
@@ -124,6 +129,7 @@ static void write_csr_int_flag_and_col(void __iomem *csr_base_addr, u32 bank,
 
 void adf_gen2_init_hw_csr_ops(struct adf_hw_csr_ops *csr_ops)
 {
+       csr_ops->build_csr_ring_base_addr = build_csr_ring_base_addr;
        csr_ops->read_csr_ring_head = read_csr_ring_head;
        csr_ops->write_csr_ring_head = write_csr_ring_head;
        csr_ops->read_csr_ring_tail = read_csr_ring_tail;

diff --git a/drivers/crypto/qat/qat_common/adf_gen2_hw_data.h b/drivers/crypto/qat/qat_common/adf_gen2_hw_data.h
index 6c860aedb301310d3d9cb87c33421a3aa9bd66b4..212ff395201f058b96f087b75ea8634686964efa 100644 (file)
--- a/drivers/crypto/qat/qat_common/adf_gen2_hw_data.h
+++ b/drivers/crypto/qat/qat_common/adf_gen2_hw_data.h
@@ -23,6 +23,8 @@
 #define ADF_RING_CSR_INT_COL_CTL_ENABLE        0x80000000
 #define ADF_RING_BUNDLE_SIZE           0x1000
 
+#define BUILD_RING_BASE_ADDR(addr, size) \
+       (((addr) >> 6) & (0xFFFFFFFFFFFFFFFFULL << (size)))
 #define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \
        ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \
                   ADF_RING_CSR_RING_HEAD + ((ring) << 2))

diff --git a/drivers/crypto/qat/qat_common/adf_transport.c b/drivers/crypto/qat/qat_common/adf_transport.c
index 03fb7812818b456a393ab035df019fe9a98502db..dd8f94fcb9a87cf60bd0735eab0d16d79cae2bdc 100644 (file)
--- a/drivers/crypto/qat/qat_common/adf_transport.c
+++ b/drivers/crypto/qat/qat_common/adf_transport.c
@@ -180,7 +180,9 @@ static int adf_init_ring(struct adf_etr_ring_data *ring)
        else
                adf_configure_rx_ring(ring);
 
-       ring_base = BUILD_RING_BASE_ADDR(ring->dma_addr, ring->ring_size);
+       ring_base = csr_ops->build_csr_ring_base_addr(ring->dma_addr,
+                                                     ring->ring_size);
+
        csr_ops->write_csr_ring_base(ring->bank->csr_addr,
                                     ring->bank->bank_number, ring->ring_number,
                                     ring_base);

diff --git a/drivers/crypto/qat/qat_common/adf_transport_access_macros.h b/drivers/crypto/qat/qat_common/adf_transport_access_macros.h
index 4642b0b5cfb0d37e118193cc73c52590abcee3de..12b1605a740e7b31fd933ade5ba1feca8a3f77f8 100644 (file)
--- a/drivers/crypto/qat/qat_common/adf_transport_access_macros.h
+++ b/drivers/crypto/qat/qat_common/adf_transport_access_macros.h
@@ -56,6 +56,4 @@
        ((watermark_nf << ADF_RING_CONFIG_NEAR_FULL_WM) \
        | (watermark_ne << ADF_RING_CONFIG_NEAR_EMPTY_WM) \
        | size)
-#define BUILD_RING_BASE_ADDR(addr, size) \
-       ((addr >> 6) & (0xFFFFFFFFFFFFFFFFULL << size))
 #endif