efi/cper, cxl: Make definitions and structures global

In preparation to add tracepoint support, move protocol error UUID
definition to a common location, Also, make struct CXL RAS capability,
cxl_cper_sec_prot_err and CPER validation flags global for use across
different modules.

Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Reviewed-by: Gregory Price <gourry@gourry.net>
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
Link: https://patch.msgid.link/20250123084421.127697-3-Smita.KoralahalliChannabasappa@amd.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>

diff --git a/drivers/firmware/efi/cper.c b/drivers/firmware/efi/cper.c
index 8e5762f7ef2e7876a996684a40920a47ac0b1760..ae1953e2b214e1e8e9f07172f07f509e2f306ca4 100644 (file)
--- a/drivers/firmware/efi/cper.c
+++ b/drivers/firmware/efi/cper.c
@@ -24,6 +24,7 @@
 #include <linux/bcd.h>
 #include <acpi/ghes.h>
 #include <ras/ras_event.h>
+#include <cxl/event.h>
 #include "cper_cxl.h"
 
 /*

diff --git a/drivers/firmware/efi/cper_cxl.c b/drivers/firmware/efi/cper_cxl.c
index cbaabcb7382d9e85a0a0b55891a99ac80333e4cd..64c0dd27be6ed10254aadf462e823b1f43f7e2b5 100644 (file)
--- a/drivers/firmware/efi/cper_cxl.c
+++ b/drivers/firmware/efi/cper_cxl.c
@@ -8,27 +8,9 @@
  */
 
 #include <linux/cper.h>
+#include <cxl/event.h>
 #include "cper_cxl.h"
 
-#define PROT_ERR_VALID_AGENT_TYPE              BIT_ULL(0)
-#define PROT_ERR_VALID_AGENT_ADDRESS           BIT_ULL(1)
-#define PROT_ERR_VALID_DEVICE_ID               BIT_ULL(2)
-#define PROT_ERR_VALID_SERIAL_NUMBER           BIT_ULL(3)
-#define PROT_ERR_VALID_CAPABILITY              BIT_ULL(4)
-#define PROT_ERR_VALID_DVSEC                   BIT_ULL(5)
-#define PROT_ERR_VALID_ERROR_LOG               BIT_ULL(6)
-
-/* CXL RAS Capability Structure, CXL v3.0 sec 8.2.4.16 */
-struct cxl_ras_capability_regs {
-       u32 uncor_status;
-       u32 uncor_mask;
-       u32 uncor_severity;
-       u32 cor_status;
-       u32 cor_mask;
-       u32 cap_control;
-       u32 header_log[16];
-};
-
 static const char * const prot_err_agent_type_strs[] = {
        "Restricted CXL Device",
        "Restricted CXL Host Downstream Port",
@@ -40,21 +22,6 @@ static const char * const prot_err_agent_type_strs[] = {
        "CXL Upstream Switch Port",
 };
 
-/*
- * The layout of the enumeration and the values matches CXL Agent Type
- * field in the UEFI 2.10 Section N.2.13,
- */
-enum {
-       RCD,    /* Restricted CXL Device */
-       RCH_DP, /* Restricted CXL Host Downstream Port */
-       DEVICE, /* CXL Device */
-       LD,     /* CXL Logical Device */
-       FMLD,   /* CXL Fabric Manager managed Logical Device */
-       RP,     /* CXL Root Port */
-       DSP,    /* CXL Downstream Switch Port */
-       USP,    /* CXL Upstream Switch Port */
-};
-
 void cxl_cper_print_prot_err(const char *pfx,
                             const struct cxl_cper_sec_prot_err *prot_err)
 {

diff --git a/drivers/firmware/efi/cper_cxl.h b/drivers/firmware/efi/cper_cxl.h
index 0e3ab0ba17c36fe0e726daa0da30e131cf863207..5ce1401ee17afa505eaaf913ca77b92b8a1df434 100644 (file)
--- a/drivers/firmware/efi/cper_cxl.h
+++ b/drivers/firmware/efi/cper_cxl.h
@@ -10,57 +10,6 @@
 #ifndef LINUX_CPER_CXL_H
 #define LINUX_CPER_CXL_H
 
-/* CXL Protocol Error Section */
-#define CPER_SEC_CXL_PROT_ERR                                          \
-       GUID_INIT(0x80B9EFB4, 0x52B5, 0x4DE3, 0xA7, 0x77, 0x68, 0x78,   \
-                 0x4B, 0x77, 0x10, 0x48)
-
-#pragma pack(1)
-
-/* Compute Express Link Protocol Error Section, UEFI v2.10 sec N.2.13 */
-struct cxl_cper_sec_prot_err {
-       u64 valid_bits;
-       u8 agent_type;
-       u8 reserved[7];
-
-       /*
-        * Except for RCH Downstream Port, all the remaining CXL Agent
-        * types are uniquely identified by the PCIe compatible SBDF number.
-        */
-       union {
-               u64 rcrb_base_addr;
-               struct {
-                       u8 function;
-                       u8 device;
-                       u8 bus;
-                       u16 segment;
-                       u8 reserved_1[3];
-               };
-       } agent_addr;
-
-       struct {
-               u16 vendor_id;
-               u16 device_id;
-               u16 subsystem_vendor_id;
-               u16 subsystem_id;
-               u8 class_code[2];
-               u16 slot;
-               u8 reserved_1[4];
-       } device_id;
-
-       struct {
-               u32 lower_dw;
-               u32 upper_dw;
-       } dev_serial_num;
-
-       u8 capability[60];
-       u16 dvsec_len;
-       u16 err_len;
-       u8 reserved_2[4];
-};
-
-#pragma pack()
-
 void cxl_cper_print_prot_err(const char *pfx,
                             const struct cxl_cper_sec_prot_err *prot_err);
 

diff --git a/include/cxl/event.h b/include/cxl/event.h
index 04edd44bd26fcf47601fcbde7fe0d7fb5cd788c4..7a6c14c05215e5e97f0847c29ef2620325c7e8b9 100644 (file)
--- a/include/cxl/event.h
+++ b/include/cxl/event.h
@@ -164,6 +164,86 @@ struct cxl_cper_work_data {
        struct cxl_cper_event_rec rec;
 };
 
+#define PROT_ERR_VALID_AGENT_TYPE              BIT_ULL(0)
+#define PROT_ERR_VALID_AGENT_ADDRESS           BIT_ULL(1)
+#define PROT_ERR_VALID_DEVICE_ID               BIT_ULL(2)
+#define PROT_ERR_VALID_SERIAL_NUMBER           BIT_ULL(3)
+#define PROT_ERR_VALID_CAPABILITY              BIT_ULL(4)
+#define PROT_ERR_VALID_DVSEC                   BIT_ULL(5)
+#define PROT_ERR_VALID_ERROR_LOG               BIT_ULL(6)
+
+/*
+ * The layout of the enumeration and the values matches CXL Agent Type
+ * field in the UEFI 2.10 Section N.2.13,
+ */
+enum {
+       RCD,    /* Restricted CXL Device */
+       RCH_DP, /* Restricted CXL Host Downstream Port */
+       DEVICE, /* CXL Device */
+       LD,     /* CXL Logical Device */
+       FMLD,   /* CXL Fabric Manager managed Logical Device */
+       RP,     /* CXL Root Port */
+       DSP,    /* CXL Downstream Switch Port */
+       USP,    /* CXL Upstream Switch Port */
+};
+
+#pragma pack(1)
+
+/* Compute Express Link Protocol Error Section, UEFI v2.10 sec N.2.13 */
+struct cxl_cper_sec_prot_err {
+       u64 valid_bits;
+       u8 agent_type;
+       u8 reserved[7];
+
+       /*
+        * Except for RCH Downstream Port, all the remaining CXL Agent
+        * types are uniquely identified by the PCIe compatible SBDF number.
+        */
+       union {
+               u64 rcrb_base_addr;
+               struct {
+                       u8 function;
+                       u8 device;
+                       u8 bus;
+                       u16 segment;
+                       u8 reserved_1[3];
+               };
+       } agent_addr;
+
+       struct {
+               u16 vendor_id;
+               u16 device_id;
+               u16 subsystem_vendor_id;
+               u16 subsystem_id;
+               u8 class_code[2];
+               u16 slot;
+               u8 reserved_1[4];
+       } device_id;
+
+       struct {
+               u32 lower_dw;
+               u32 upper_dw;
+       } dev_serial_num;
+
+       u8 capability[60];
+       u16 dvsec_len;
+       u16 err_len;
+       u8 reserved_2[4];
+};
+
+#pragma pack()
+
+/* CXL RAS Capability Structure, CXL v3.0 sec 8.2.4.16 */
+struct cxl_ras_capability_regs {
+       u32 uncor_status;
+       u32 uncor_mask;
+       u32 uncor_severity;
+       u32 cor_status;
+       u32 cor_mask;
+       u32 cap_control;
+       u32 header_log[16];
+};
+
 #ifdef CONFIG_ACPI_APEI_GHES
 int cxl_cper_register_work(struct work_struct *work);
 int cxl_cper_unregister_work(struct work_struct *work);

diff --git a/include/linux/cper.h b/include/linux/cper.h
index 265b0f8fc0b3c876191ba94bbc2d1d9dd66dd848..5c6d4d5b997534c5a7ce8c16f79262b3875e0ce1 100644 (file)
--- a/include/linux/cper.h
+++ b/include/linux/cper.h
@@ -89,6 +89,10 @@ enum {
 #define CPER_NOTIFY_DMAR                                               \
        GUID_INIT(0x667DD791, 0xC6B3, 0x4c27, 0x8A, 0x6B, 0x0F, 0x8E,   \
                  0x72, 0x2D, 0xEB, 0x41)
+/* CXL Protocol Error Section */
+#define CPER_SEC_CXL_PROT_ERR                                          \
+       GUID_INIT(0x80B9EFB4, 0x52B5, 0x4DE3, 0xA7, 0x77, 0x68, 0x78,   \
+                 0x4B, 0x77, 0x10, 0x48)
 
 /* CXL Event record UUIDs are formatted as GUIDs and reported in section type */
 /*