* process in case of 64-bit doorbells so we
                         * can use each doorbell assignment twice.
                         */
-                       if (adev->asic_type == CHIP_VEGA10) {
-                               gpu_resources.sdma_doorbell[0][i] =
-                                       AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE0 + (i >> 1);
-                               gpu_resources.sdma_doorbell[0][i+1] =
-                                       AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE0 + 0x200 + (i >> 1);
-                               gpu_resources.sdma_doorbell[1][i] =
-                                       AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE1 + (i >> 1);
-                               gpu_resources.sdma_doorbell[1][i+1] =
-                                       AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE1 + 0x200 + (i >> 1);
-                       } else {
-                               gpu_resources.sdma_doorbell[0][i] =
-                                       AMDGPU_DOORBELL64_sDMA_ENGINE0 + (i >> 1);
-                               gpu_resources.sdma_doorbell[0][i+1] =
-                                       AMDGPU_DOORBELL64_sDMA_ENGINE0 + 0x200 + (i >> 1);
-                               gpu_resources.sdma_doorbell[1][i] =
-                                       AMDGPU_DOORBELL64_sDMA_ENGINE1 + (i >> 1);
-                               gpu_resources.sdma_doorbell[1][i+1] =
-                                       AMDGPU_DOORBELL64_sDMA_ENGINE1 + 0x200 + (i >> 1);
-                       }
+                       gpu_resources.sdma_doorbell[0][i] =
+                               adev->doorbell_index.sdma_engine0 + (i >> 1);
+                       gpu_resources.sdma_doorbell[0][i+1] =
+                               adev->doorbell_index.sdma_engine0 + 0x200 + (i >> 1);
+                       gpu_resources.sdma_doorbell[1][i] =
+                               adev->doorbell_index.sdma_engine1 + (i >> 1);
+                       gpu_resources.sdma_doorbell[1][i+1] =
+                               adev->doorbell_index.sdma_engine1 + 0x200 + (i >> 1);
                }
                /* Doorbells 0x0e0-0ff and 0x2e0-2ff are reserved for
                 * SDMA, IH and VCN. So don't use them for the CP.
 
        adev->doorbell.size = pci_resource_len(adev->pdev, 2);
 
        adev->doorbell.num_doorbells = min_t(u32, adev->doorbell.size / sizeof(u32),
-                                            AMDGPU_DOORBELL_MAX_ASSIGNMENT+1);
+                                            adev->doorbell_index.max_assignment+1);
        if (adev->doorbell.num_doorbells == 0)
                return -EINVAL;
 
 
        ring->adev = NULL;
        ring->ring_obj = NULL;
        ring->use_doorbell = true;
-       ring->doorbell_index = AMDGPU_DOORBELL_KIQ;
+       ring->doorbell_index = adev->doorbell_index.kiq;
 
        r = amdgpu_gfx_kiq_acquire(adev, ring);
        if (r)
 
 
        ring->ring_obj = NULL;
        ring->use_doorbell = true;
-       ring->doorbell_index = AMDGPU_DOORBELL_MEC_RING0 + ring_id;
+       ring->doorbell_index = adev->doorbell_index.mec_ring0 + ring_id;
        sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue);
 
        irq_type = AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP
 
 
        ring->ring_obj = NULL;
        ring->use_doorbell = true;
-       ring->doorbell_index = AMDGPU_DOORBELL_MEC_RING0 + ring_id;
+       ring->doorbell_index = adev->doorbell_index.mec_ring0 + ring_id;
        ring->eop_gpu_addr = adev->gfx.mec.hpd_eop_gpu_addr
                                + (ring_id * GFX8_MEC_HPD_SIZE);
        sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue);
                /* no gfx doorbells on iceland */
                if (adev->asic_type != CHIP_TOPAZ) {
                        ring->use_doorbell = true;
-                       ring->doorbell_index = AMDGPU_DOORBELL_GFX_RING0;
+                       ring->doorbell_index = adev->doorbell_index.gfx_ring0;
                }
 
                r = amdgpu_ring_init(adev, ring, 1024, &adev->gfx.eop_irq,
 
        tmp = REG_SET_FIELD(0, CP_RB_DOORBELL_RANGE_LOWER,
                                        DOORBELL_RANGE_LOWER,
-                                       AMDGPU_DOORBELL_GFX_RING0);
+                                       adev->doorbell_index.gfx_ring0);
        WREG32(mmCP_RB_DOORBELL_RANGE_LOWER, tmp);
 
        WREG32(mmCP_RB_DOORBELL_RANGE_UPPER,
 static void gfx_v8_0_set_mec_doorbell_range(struct amdgpu_device *adev)
 {
        if (adev->asic_type > CHIP_TONGA) {
-               WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER, AMDGPU_DOORBELL_KIQ << 2);
-               WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER, AMDGPU_DOORBELL_MEC_RING7 << 2);
+               WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER, adev->doorbell_index.kiq << 2);
+               WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER, adev->doorbell_index.mec_ring7 << 2);
        }
        /* enable doorbells */
        WREG32_FIELD(CP_PQ_STATUS, DOORBELL_ENABLE, 1);
 
 
        ring->ring_obj = NULL;
        ring->use_doorbell = true;
-       ring->doorbell_index = (AMDGPU_DOORBELL64_MEC_RING0 + ring_id) << 1;
+       ring->doorbell_index = (adev->doorbell_index.mec_ring0 + ring_id) << 1;
        ring->eop_gpu_addr = adev->gfx.mec.hpd_eop_gpu_addr
                                + (ring_id * GFX9_MEC_HPD_SIZE);
        sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue);
                else
                        sprintf(ring->name, "gfx_%d", i);
                ring->use_doorbell = true;
-               ring->doorbell_index = AMDGPU_DOORBELL64_GFX_RING0 << 1;
+               ring->doorbell_index = adev->doorbell_index.gfx_ring0 << 1;
                r = amdgpu_ring_init(adev, ring, 1024,
                                     &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_EOP);
                if (r)
        /* enable the doorbell if requested */
        if (ring->use_doorbell) {
                WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_LOWER,
-                                       (AMDGPU_DOORBELL64_KIQ *2) << 2);
+                                       (adev->doorbell_index.kiq * 2) << 2);
                WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,
-                                       (AMDGPU_DOORBELL64_USERQUEUE_END * 2) << 2);
+                                       (adev->doorbell_index.userqueue_end * 2) << 2);
        }
 
        WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL,
 
                if (!amdgpu_sriov_vf(adev)) {
                        ring->use_doorbell = true;
                        ring->doorbell_index = (i == 0) ?
-                               AMDGPU_DOORBELL_sDMA_ENGINE0 : AMDGPU_DOORBELL_sDMA_ENGINE1;
+                               adev->doorbell_index.sdma_engine0 : adev->doorbell_index.sdma_engine1;
                } else {
                        ring->use_pollmem = true;
                }
 
                ring->ring_obj = NULL;
                ring->use_doorbell = true;
 
+               DRM_INFO("use_doorbell being set to: [%s]\n",
+                               ring->use_doorbell?"true":"false");
+
                /* doorbell size is 2 dwords, get DWORD offset */
-               if (adev->asic_type == CHIP_VEGA10)
-                       ring->doorbell_index = (i == 0) ?
-                               (AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE0 << 1)
-                               : (AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE1 << 1);
-               else
-                       ring->doorbell_index = (i == 0) ?
-                               (AMDGPU_DOORBELL64_sDMA_ENGINE0 << 1)
-                               : (AMDGPU_DOORBELL64_sDMA_ENGINE1 << 1);
+               ring->doorbell_index = (i == 0) ?
+                       (adev->doorbell_index.sdma_engine0 << 1)
+                       : (adev->doorbell_index.sdma_engine1 << 1);
 
                sprintf(ring->name, "sdma%d", i);
                r = amdgpu_ring_init(adev, ring, 1024,
                        /* paging queue use same doorbell index/routing as gfx queue
                         * with 0x400 (4096 dwords) offset on second doorbell page
                         */
-                       if (adev->asic_type == CHIP_VEGA10)
-                               ring->doorbell_index = (i == 0) ?
-                                       (AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE0 << 1)
-                                       : (AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE1 << 1);
-                       else
-                               ring->doorbell_index = (i == 0) ?
-                                       (AMDGPU_DOORBELL64_sDMA_ENGINE0 << 1)
-                                       : (AMDGPU_DOORBELL64_sDMA_ENGINE1 << 1);
+                       ring->doorbell_index = (i == 0) ?
+                               (adev->doorbell_index.sdma_engine0 << 1)
+                               : (adev->doorbell_index.sdma_engine1 << 1);
                        ring->doorbell_index += 0x400;
 
                        sprintf(ring->name, "page%d", i);
 
                return r;
 
        adev->irq.ih.use_doorbell = true;
-       adev->irq.ih.doorbell_index = AMDGPU_DOORBELL_IH;
+       adev->irq.ih.doorbell_index = adev->doorbell_index.ih;
 
        r = amdgpu_irq_init(adev);
 
 
                                 * sriov, so set unused location for other unused rings.
                                 */
                                if (i == 0)
-                                       ring->doorbell_index = AMDGPU_DOORBELL64_UVD_RING0_1 * 2;
+                                       ring->doorbell_index = adev->doorbell_index.uvd_vce.uvd_ring0_1 * 2;
                                else
-                                       ring->doorbell_index = AMDGPU_DOORBELL64_UVD_RING2_3 * 2 + 1;
+                                       ring->doorbell_index = adev->doorbell_index.uvd_vce.uvd_ring2_3 * 2 + 1;
                        }
                        r = amdgpu_ring_init(adev, ring, 512, &adev->uvd.inst[j].irq, 0);
                        if (r)
 
                         * so set unused location for other unused rings.
                         */
                        if (i == 0)
-                               ring->doorbell_index = AMDGPU_DOORBELL64_VCE_RING0_1 * 2;
+                               ring->doorbell_index = adev->doorbell_index.uvd_vce.vce_ring0_1 * 2;
                        else
-                               ring->doorbell_index = AMDGPU_DOORBELL64_VCE_RING2_3 * 2 + 1;
+                               ring->doorbell_index = adev->doorbell_index.uvd_vce.vce_ring2_3 * 2 + 1;
                }
                r = amdgpu_ring_init(adev, ring, 512, &adev->vce.irq, 0);
                if (r)
 
                return r;
 
        adev->irq.ih.use_doorbell = true;
-       adev->irq.ih.doorbell_index = AMDGPU_DOORBELL64_IH << 1;
+       adev->irq.ih.doorbell_index = adev->doorbell_index.ih << 1;
 
        r = amdgpu_irq_init(adev);