]> www.infradead.org Git - users/hch/misc.git/commitdiff
staging: rtl8192e: Join constants Rtl819XPHY_REG_.. with ..PciEPHY_REG_..
authorPhilipp Hortmann <philipp.g.hortmann@gmail.com>
Tue, 14 Mar 2023 18:44:20 +0000 (19:44 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 16 Mar 2023 08:37:19 +0000 (09:37 +0100)
Join constants Rtl819XPHY_REG_1T2RArray with Rtl8192PciEPHY_REG_1T2RArray
to RTL8192E_PHY_REG_1T2R_ARR to improve readability.

Signed-off-by: Philipp Hortmann <philipp.g.hortmann@gmail.com>
Link: https://lore.kernel.org/r/2816a10a8a534014c58e0092b78443e01a67930a.1678814935.git.philipp.g.hortmann@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c
drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h
drivers/staging/rtl8192e/rtl8192e/table.c
drivers/staging/rtl8192e/rtl8192e/table.h

index 72ecdb9ea375a16c9bf0474a13d14389caf1cbb5..2dbddf4ae3d67ad2fc917a8bcc44773316edadb2 100644 (file)
@@ -316,7 +316,7 @@ static void _rtl92e_phy_config_bb(struct net_device *dev, u8 ConfigType)
        Rtl819XAGCTAB_Array_Table = RTL8192E_AGCTAB_ARR;
        if (priv->rf_type == RF_1T2R) {
                PHY_REGArrayLen = RTL8192E_PHY_REG_1T2R_ARR_LEN;
-               Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_1T2RArray;
+               Rtl819XPHY_REGArray_Table = RTL8192E_PHY_REG_1T2R_ARR;
        }
 
        if (ConfigType == BB_CONFIG_PHY_REG) {
index 1f9bafd6d3ccb07cfc79d2cb894b8eeafb69c323..6723fcce895485b737091d2ca2a9e2e25dfdcb5e 100644 (file)
@@ -9,8 +9,6 @@
 
 #define MAX_DOZE_WAITING_TIMES_9x 64
 
-#define Rtl819XPHY_REG_1T2RArray               Rtl8192PciEPHY_REG_1T2RArray
-
 extern u32 rtl819XAGCTAB_Array[];
 
 enum hw90_block {
index 3a7656facefcec8c9cfe71d2c4b4a484799cfa0d..0b5cc60492323aba761ab0352ddea04372d8c799 100644 (file)
@@ -6,7 +6,7 @@
  */
 #include "table.h"
 
-u32 Rtl8192PciEPHY_REG_1T2RArray[RTL8192E_PHY_REG_1T2R_ARR_LEN] = {
+u32 RTL8192E_PHY_REG_1T2R_ARR[RTL8192E_PHY_REG_1T2R_ARR_LEN] = {
        0x800, 0x00000000,
        0x804, 0x00000001,
        0x808, 0x0000fc00,
index 576228882c21e37d63f74277a71e194b149a479e..82be44a9d4e8d51002e2c543b0201d6157da57af 100644 (file)
@@ -12,7 +12,7 @@
 #include <linux/types.h>
 
 #define RTL8192E_PHY_REG_1T2R_ARR_LEN 296
-extern u32 Rtl8192PciEPHY_REG_1T2RArray[RTL8192E_PHY_REG_1T2R_ARR_LEN];
+extern u32 RTL8192E_PHY_REG_1T2R_ARR[RTL8192E_PHY_REG_1T2R_ARR_LEN];
 #define RTL8192E_RADIO_A_ARR_LEN 246
 extern u32 RTL8192E_RADIO_A_ARR[RTL8192E_RADIO_A_ARR_LEN];
 #define RTL8192E_RADIO_B_ARR_LEN 78