HSYNC_START(adjusted_mode->crtc_hsync_start - 1) |
                       HSYNC_END(adjusted_mode->crtc_hsync_end - 1));
 
+       /*
+        * For platforms that always use VRR Timing Generator, the VTOTAL.Vtotal
+        * bits are not required. Since the support for these bits is going to
+        * be deprecated in upcoming platforms, avoid writing these bits for the
+        * platforms that do not use legacy Timing Generator.
+        */
+       if (intel_vrr_always_use_vrr_tg(display))
+               crtc_vtotal = 1;
+
        intel_de_write(display, TRANS_VTOTAL(display, cpu_transcoder),
                       VACTIVE(crtc_vdisplay - 1) |
                       VTOTAL(crtc_vtotal - 1));
        intel_de_write(display, TRANS_VBLANK(display, cpu_transcoder),
                       VBLANK_START(crtc_vblank_start - 1) |
                       VBLANK_END(crtc_vblank_end - 1));
+       /*
+        * For platforms that always use VRR Timing Generator, the VTOTAL.Vtotal
+        * bits are not required. Since the support for these bits is going to
+        * be deprecated in upcoming platforms, avoid writing these bits for the
+        * platforms that do not use legacy Timing Generator.
+        */
+       if (intel_vrr_always_use_vrr_tg(display))
+               crtc_vtotal = 1;
+
        /*
         * The double buffer latch point for TRANS_VTOTAL
         * is the transcoder's undelayed vblank.
 
                crtc_state->vrr.vmin = intel_de_read(display,
                                                     TRANS_VRR_VMIN(display, cpu_transcoder)) + 1;
 
+               /*
+                * For platforms that always use VRR Timing Generator, the VTOTAL.Vtotal
+                * bits are not filled. Since for these platforms TRAN_VMIN is always
+                * filled with crtc_vtotal, use TRAN_VRR_VMIN to get the vtotal for
+                * adjusted_mode.
+                */
+               if (intel_vrr_always_use_vrr_tg(display))
+                       crtc_state->hw.adjusted_mode.crtc_vtotal =
+                               intel_vrr_vmin_vtotal(crtc_state);
+
                if (HAS_AS_SDP(display)) {
                        trans_vrr_vsync =
                                intel_de_read(display,