static int ov5648_mipi_configure(struct ov5648_sensor *sensor)
{
- struct v4l2_fwnode_bus_mipi_csi2 *bus_mipi_csi2 =
+ struct v4l2_mbus_config_mipi_csi2 *bus_mipi_csi2 =
&sensor->endpoint.bus.mipi_csi2;
unsigned int lanes_count = bus_mipi_csi2->num_data_lanes;
int ret;
u32 mbus_code)
{
struct ov5648_ctrls *ctrls = &sensor->ctrls;
- struct v4l2_fwnode_bus_mipi_csi2 *bus_mipi_csi2 =
+ struct v4l2_mbus_config_mipi_csi2 *bus_mipi_csi2 =
&sensor->endpoint.bus.mipi_csi2;
unsigned long mipi_clk_rate;
unsigned int bits_per_sample;
static int ov8865_mipi_configure(struct ov8865_sensor *sensor)
{
- struct v4l2_fwnode_bus_mipi_csi2 *bus_mipi_csi2 =
+ struct v4l2_mbus_config_mipi_csi2 *bus_mipi_csi2 =
&sensor->endpoint.bus.mipi_csi2;
unsigned int lanes_count = bus_mipi_csi2->num_data_lanes;
int ret;
u32 mbus_code)
{
struct ov8865_ctrls *ctrls = &sensor->ctrls;
- struct v4l2_fwnode_bus_mipi_csi2 *bus_mipi_csi2 =
+ struct v4l2_mbus_config_mipi_csi2 *bus_mipi_csi2 =
&sensor->endpoint.bus.mipi_csi2;
unsigned long mipi_clk_rate;
unsigned int bits_per_sample;
struct tc358743_state {
struct tc358743_platform_data pdata;
- struct v4l2_fwnode_bus_mipi_csi2 bus;
+ struct v4l2_mbus_config_mipi_csi2 bus;
struct v4l2_subdev sd;
struct media_pad pad;
struct v4l2_ctrl_handler hdl;
struct camss_async_subdev *csd)
{
struct csiphy_lanes_cfg *lncfg = &csd->interface.csi2.lane_cfg;
- struct v4l2_fwnode_bus_mipi_csi2 *mipi_csi2;
+ struct v4l2_mbus_config_mipi_csi2 *mipi_csi2;
struct v4l2_fwnode_endpoint vep = { { 0 } };
unsigned int i;
struct v4l2_subdev *subdev;
enum v4l2_mbus_type mbus_type;
- struct v4l2_fwnode_bus_parallel bus;
+ struct v4l2_mbus_config_parallel bus;
unsigned int source_pad;
unsigned int sink_pad;
struct mutex lock;
struct vb2_queue queue;
- struct v4l2_fwnode_bus_parallel bus;
+ struct v4l2_mbus_config_parallel bus;
enum v4l2_mbus_type bus_type;
struct completion complete;
struct clk *mclk;
dma_addr_t paddr;
} scratch;
- struct v4l2_fwnode_bus_parallel bus;
+ struct v4l2_mbus_config_parallel bus;
/* Main Device */
struct v4l2_device v4l;
static int sun4i_csi_start_streaming(struct vb2_queue *vq, unsigned int count)
{
struct sun4i_csi *csi = vb2_get_drv_priv(vq);
- struct v4l2_fwnode_bus_parallel *bus = &csi->bus;
+ struct v4l2_mbus_config_parallel *bus = &csi->bus;
const struct sun4i_csi_format *csi_fmt;
unsigned long href_pol, pclk_pol, vref_pol;
unsigned long flags;
static s64 cal_camerarx_get_ext_link_freq(struct cal_camerarx *phy)
{
- struct v4l2_fwnode_bus_mipi_csi2 *mipi_csi2 = &phy->endpoint.bus.mipi_csi2;
+ struct v4l2_mbus_config_mipi_csi2 *mipi_csi2 = &phy->endpoint.bus.mipi_csi2;
u32 num_lanes = mipi_csi2->num_data_lanes;
const struct cal_format_info *fmtinfo;
u32 bpp;
u32 val = cal_read(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance));
u32 lane_mask = CAL_CSI2_COMPLEXIO_CFG_CLOCK_POSITION_MASK;
u32 polarity_mask = CAL_CSI2_COMPLEXIO_CFG_CLOCK_POL_MASK;
- struct v4l2_fwnode_bus_mipi_csi2 *mipi_csi2 =
+ struct v4l2_mbus_config_mipi_csi2 *mipi_csi2 =
&phy->endpoint.bus.mipi_csi2;
int lane;
static int cal_camerarx_parse_dt(struct cal_camerarx *phy)
{
struct v4l2_fwnode_endpoint *endpoint = &phy->endpoint;
- char data_lanes[V4L2_FWNODE_CSI2_MAX_DATA_LANES * 2];
+ char data_lanes[V4L2_MBUS_CSI2_MAX_DATA_LANES * 2];
struct device_node *ep_node;
unsigned int i;
int ret;
struct v4l2_fwnode_endpoint *vep,
enum v4l2_mbus_type bus_type)
{
- struct v4l2_fwnode_bus_mipi_csi2 *bus = &vep->bus.mipi_csi2;
+ struct v4l2_mbus_config_mipi_csi2 *bus = &vep->bus.mipi_csi2;
bool have_clk_lane = false, have_data_lanes = false,
have_lane_polarities = false;
unsigned int flags = 0, lanes_used = 0;
- u32 array[1 + V4L2_FWNODE_CSI2_MAX_DATA_LANES];
+ u32 array[1 + V4L2_MBUS_CSI2_MAX_DATA_LANES];
u32 clock_lane = 0;
unsigned int num_data_lanes = 0;
bool use_default_lane_mapping = false;
use_default_lane_mapping = true;
num_data_lanes = min_t(u32, bus->num_data_lanes,
- V4L2_FWNODE_CSI2_MAX_DATA_LANES);
+ V4L2_MBUS_CSI2_MAX_DATA_LANES);
clock_lane = bus->clock_lane;
if (clock_lane)
rval = fwnode_property_count_u32(fwnode, "data-lanes");
if (rval > 0) {
num_data_lanes =
- min_t(int, V4L2_FWNODE_CSI2_MAX_DATA_LANES, rval);
+ min_t(int, V4L2_MBUS_CSI2_MAX_DATA_LANES, rval);
fwnode_property_read_u32_array(fwnode, "data-lanes", array,
num_data_lanes);
struct v4l2_fwnode_endpoint *vep,
enum v4l2_mbus_type bus_type)
{
- struct v4l2_fwnode_bus_parallel *bus = &vep->bus.parallel;
+ struct v4l2_mbus_config_parallel *bus = &vep->bus.parallel;
unsigned int flags = 0;
u32 v;
struct v4l2_fwnode_endpoint *vep,
enum v4l2_mbus_type bus_type)
{
- struct v4l2_fwnode_bus_mipi_csi1 *bus = &vep->bus.mipi_csi1;
+ struct v4l2_mbus_config_mipi_csi1 *bus = &vep->bus.mipi_csi1;
u32 v;
if (!fwnode_property_read_u32(fwnode, "clock-inv", &v)) {
struct v4l2_async_notifier notifier;
struct v4l2_subdev *src_sd;
- struct v4l2_fwnode_bus_mipi_csi2 bus;
+ struct v4l2_mbus_config_mipi_csi2 bus;
u32 clk_frequency;
u32 hs_settle;
u32 clk_settle;
struct v4l2_async_notifier notifier;
struct v4l2_subdev *src_sd;
- struct v4l2_fwnode_bus_mipi_csi2 bus;
+ struct v4l2_mbus_config_mipi_csi2 bus;
struct mutex lock; /* Protect csi2_fmt, format_mbus, state, hs_settle */
const struct csi2_pix_format *csi2_fmt;
struct regmap *regmap;
struct gpio_desc *gpiod_pwdn;
- struct v4l2_fwnode_bus_mipi_csi2 mipi;
+ struct v4l2_mbus_config_mipi_csi2 mipi;
struct v4l2_subdev sd;
struct v4l2_ctrl_handler ctrl_handler;
struct v4l2_async_notifier;
struct v4l2_async_subdev;
-#define V4L2_FWNODE_CSI2_MAX_DATA_LANES 8
-
-/**
- * struct v4l2_fwnode_bus_mipi_csi2 - MIPI CSI-2 bus data structure
- * @flags: media bus (V4L2_MBUS_*) flags
- * @data_lanes: an array of physical data lane indexes
- * @clock_lane: physical lane index of the clock lane
- * @num_data_lanes: number of data lanes
- * @lane_polarities: polarity of the lanes. The order is the same of
- * the physical lanes.
- */
-struct v4l2_fwnode_bus_mipi_csi2 {
- unsigned int flags;
- unsigned char data_lanes[V4L2_FWNODE_CSI2_MAX_DATA_LANES];
- unsigned char clock_lane;
- unsigned char num_data_lanes;
- bool lane_polarities[1 + V4L2_FWNODE_CSI2_MAX_DATA_LANES];
-};
-
-/**
- * struct v4l2_fwnode_bus_parallel - parallel data bus data structure
- * @flags: media bus (V4L2_MBUS_*) flags
- * @bus_width: bus width in bits
- * @data_shift: data shift in bits
- */
-struct v4l2_fwnode_bus_parallel {
- unsigned int flags;
- unsigned char bus_width;
- unsigned char data_shift;
-};
-
-/**
- * struct v4l2_fwnode_bus_mipi_csi1 - CSI-1/CCP2 data bus structure
- * @clock_inv: polarity of clock/strobe signal
- * false - not inverted, true - inverted
- * @strobe: false - data/clock, true - data/strobe
- * @lane_polarity: the polarities of the clock (index 0) and data lanes
- * index (1)
- * @data_lane: the number of the data lane
- * @clock_lane: the number of the clock lane
- */
-struct v4l2_fwnode_bus_mipi_csi1 {
- unsigned char clock_inv:1;
- unsigned char strobe:1;
- bool lane_polarity[2];
- unsigned char data_lane;
- unsigned char clock_lane;
-};
-
/**
* struct v4l2_fwnode_endpoint - the endpoint data structure
* @base: fwnode endpoint of the v4l2_fwnode
* @bus_type: bus type
* @bus: bus configuration data structure
- * @bus.parallel: embedded &struct v4l2_fwnode_bus_parallel.
+ * @bus.parallel: embedded &struct v4l2_mbus_config_parallel.
* Used if the bus is parallel.
- * @bus.mipi_csi1: embedded &struct v4l2_fwnode_bus_mipi_csi1.
+ * @bus.mipi_csi1: embedded &struct v4l2_mbus_config_mipi_csi1.
* Used if the bus is MIPI Alliance's Camera Serial
* Interface version 1 (MIPI CSI1) or Standard
* Mobile Imaging Architecture's Compact Camera Port 2
* (SMIA CCP2).
- * @bus.mipi_csi2: embedded &struct v4l2_fwnode_bus_mipi_csi2.
+ * @bus.mipi_csi2: embedded &struct v4l2_mbus_config_mipi_csi2.
* Used if the bus is MIPI Alliance's Camera Serial
* Interface version 2 (MIPI CSI2).
* @link_frequencies: array of supported link frequencies
*/
enum v4l2_mbus_type bus_type;
struct {
- struct v4l2_fwnode_bus_parallel parallel;
- struct v4l2_fwnode_bus_mipi_csi1 mipi_csi1;
- struct v4l2_fwnode_bus_mipi_csi2 mipi_csi2;
+ struct v4l2_mbus_config_parallel parallel;
+ struct v4l2_mbus_config_mipi_csi1 mipi_csi1;
+ struct v4l2_mbus_config_mipi_csi2 mipi_csi2;
} bus;
u64 *link_frequencies;
unsigned int nr_of_link_frequencies;
V4L2_MBUS_CSI2_CHANNEL_2 | \
V4L2_MBUS_CSI2_CHANNEL_3)
+#define V4L2_MBUS_CSI2_MAX_DATA_LANES 8
+
+/**
+ * struct v4l2_mbus_config_mipi_csi2 - MIPI CSI-2 data bus configuration
+ * @flags: media bus (V4L2_MBUS_*) flags
+ * @data_lanes: an array of physical data lane indexes
+ * @clock_lane: physical lane index of the clock lane
+ * @num_data_lanes: number of data lanes
+ * @lane_polarities: polarity of the lanes. The order is the same of
+ * the physical lanes.
+ */
+struct v4l2_mbus_config_mipi_csi2 {
+ unsigned int flags;
+ unsigned char data_lanes[V4L2_MBUS_CSI2_MAX_DATA_LANES];
+ unsigned char clock_lane;
+ unsigned char num_data_lanes;
+ bool lane_polarities[1 + V4L2_MBUS_CSI2_MAX_DATA_LANES];
+};
+
+/**
+ * struct v4l2_mbus_config_parallel - parallel data bus configuration
+ * @flags: media bus (V4L2_MBUS_*) flags
+ * @bus_width: bus width in bits
+ * @data_shift: data shift in bits
+ */
+struct v4l2_mbus_config_parallel {
+ unsigned int flags;
+ unsigned char bus_width;
+ unsigned char data_shift;
+};
+
+/**
+ * struct v4l2_mbus_config_mipi_csi1 - CSI-1/CCP2 data bus configuration
+ * @clock_inv: polarity of clock/strobe signal
+ * false - not inverted, true - inverted
+ * @strobe: false - data/clock, true - data/strobe
+ * @lane_polarity: the polarities of the clock (index 0) and data lanes
+ * index (1)
+ * @data_lane: the number of the data lane
+ * @clock_lane: the number of the clock lane
+ */
+struct v4l2_mbus_config_mipi_csi1 {
+ unsigned char clock_inv:1;
+ unsigned char strobe:1;
+ bool lane_polarity[2];
+ unsigned char data_lane;
+ unsigned char clock_lane;
+};
+
/**
* enum v4l2_mbus_type - media bus type
* @V4L2_MBUS_UNKNOWN: unknown bus type, no V4L2 mediabus configuration
projects / users / hch / block.git / commitdiff