arm64: dts: ti: k3-j784s4: Fix clock IDs for MCSPI instances

The clock IDs for multiple MCSPI instances across wakeup domain in
J784s4 are incorrect when compared with documentation [1]. Fix the
clock IDs to their appropriate values.

[1] https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j784s4/clocks.html

Signed-off-by: Anurag Dutta <a-dutta@ti.com>
Link: https://lore.kernel.org/r/20241104121241.102027-1-a-dutta@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
index 7721852c1f68a22ba46f6d84b225eb4a95a07790..f27f7ae51479ca6965ac97b099e51c5999bc7478 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
@@ -2040,7 +2040,7 @@
                #address-cells = <1>;
                #size-cells = <0>;
                power-domains = <&k3_pds 376 TI_SCI_PD_EXCLUSIVE>;
-               clocks = <&k3_clks 376 1>;
+               clocks = <&k3_clks 376 0>;
                status = "disabled";
        };
 
@@ -2051,7 +2051,7 @@
                #address-cells = <1>;
                #size-cells = <0>;
                power-domains = <&k3_pds 377 TI_SCI_PD_EXCLUSIVE>;
-               clocks = <&k3_clks 377 1>;
+               clocks = <&k3_clks 377 0>;
                status = "disabled";
        };
 
@@ -2062,7 +2062,7 @@
                #address-cells = <1>;
                #size-cells = <0>;
                power-domains = <&k3_pds 378 TI_SCI_PD_EXCLUSIVE>;
-               clocks = <&k3_clks 378 1>;
+               clocks = <&k3_clks 378 0>;
                status = "disabled";
        };
 
@@ -2073,7 +2073,7 @@
                #address-cells = <1>;
                #size-cells = <0>;
                power-domains = <&k3_pds 379 TI_SCI_PD_EXCLUSIVE>;
-               clocks = <&k3_clks 379 1>;
+               clocks = <&k3_clks 379 0>;
                status = "disabled";
        };
 
@@ -2084,7 +2084,7 @@
                #address-cells = <1>;
                #size-cells = <0>;
                power-domains = <&k3_pds 380 TI_SCI_PD_EXCLUSIVE>;
-               clocks = <&k3_clks 380 1>;
+               clocks = <&k3_clks 380 0>;
                status = "disabled";
        };
 
@@ -2095,7 +2095,7 @@
                #address-cells = <1>;
                #size-cells = <0>;
                power-domains = <&k3_pds 381 TI_SCI_PD_EXCLUSIVE>;
-               clocks = <&k3_clks 381 1>;
+               clocks = <&k3_clks 381 0>;
                status = "disabled";
        };
 
@@ -2106,7 +2106,7 @@
                #address-cells = <1>;
                #size-cells = <0>;
                power-domains = <&k3_pds 382 TI_SCI_PD_EXCLUSIVE>;
-               clocks = <&k3_clks 382 1>;
+               clocks = <&k3_clks 382 0>;
                status = "disabled";
        };
 
@@ -2117,7 +2117,7 @@
                #address-cells = <1>;
                #size-cells = <0>;
                power-domains = <&k3_pds 383 TI_SCI_PD_EXCLUSIVE>;
-               clocks = <&k3_clks 383 1>;
+               clocks = <&k3_clks 383 0>;
                status = "disabled";
        };