Fix code alignment issue
Signed-off-by: Ma Jun <Jun.Ma2@amd.com>
Reported-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
        /* under multi-vf mode, the hwmon attributes are all not supported */
        if (mode != SRIOV_VF_MODE_MULTI_VF) {
                adev->pm.int_hwmon_dev = hwmon_device_register_with_groups(adev->dev,
-                                                                                                               DRIVER_NAME, adev,
-                                                                                                               hwmon_groups);
+                                                                       DRIVER_NAME, adev,
+                                                                       hwmon_groups);
                if (IS_ERR(adev->pm.int_hwmon_dev)) {
                        ret = PTR_ERR(adev->pm.int_hwmon_dev);
                        dev_err(adev->dev, "Unable to register hwmon device: %d\n", ret);
 
                        (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 10) &&
                         smu->adev->pm.fw_version >= 0x00504500)) {
                        workload_type = smu_cmn_to_asic_specific_index(smu,
-                                                                                                                  CMN2ASIC_MAPPING_WORKLOAD,
-                                                                                                                  PP_SMC_POWER_PROFILE_POWERSAVING);
+                                                               CMN2ASIC_MAPPING_WORKLOAD,
+                                                               PP_SMC_POWER_PROFILE_POWERSAVING);
                        if (workload_type >= 0)
                                workload_mask |= 1 << workload_type;
                }