cpu_relax();
}
- dev_dbg(&cxlm->pdev->dev, "Doorbell wait took %dms",
+ dev_dbg(cxlm->dev, "Doorbell wait took %dms",
jiffies_to_msecs(end) - jiffies_to_msecs(start));
return 0;
}
static void cxl_mem_mbox_timeout(struct cxl_mem *cxlm,
struct mbox_cmd *mbox_cmd)
{
- struct device *dev = &cxlm->pdev->dev;
+ struct device *dev = cxlm->dev;
dev_dbg(dev, "Mailbox command (opcode: %#x size: %zub) timed out\n",
mbox_cmd->opcode, mbox_cmd->size_in);
struct mbox_cmd *mbox_cmd)
{
void __iomem *payload = cxlm->regs.mbox + CXLDEV_MBOX_PAYLOAD_OFFSET;
+ struct device *dev = cxlm->dev;
u64 cmd_reg, status_reg;
size_t out_len;
int rc;
/* #1 */
if (cxl_doorbell_busy(cxlm)) {
- dev_err_ratelimited(&cxlm->pdev->dev,
- "Mailbox re-busy after acquiring\n");
+ dev_err_ratelimited(dev, "Mailbox re-busy after acquiring\n");
return -EBUSY;
}
writeq(cmd_reg, cxlm->regs.mbox + CXLDEV_MBOX_CMD_OFFSET);
/* #4 */
- dev_dbg(&cxlm->pdev->dev, "Sending command\n");
+ dev_dbg(dev, "Sending command\n");
writel(CXLDEV_MBOX_CTRL_DOORBELL,
cxlm->regs.mbox + CXLDEV_MBOX_CTRL_OFFSET);
FIELD_GET(CXLDEV_MBOX_STATUS_RET_CODE_MASK, status_reg);
if (mbox_cmd->return_code != 0) {
- dev_dbg(&cxlm->pdev->dev, "Mailbox operation had an error\n");
+ dev_dbg(dev, "Mailbox operation had an error\n");
return 0;
}
*/
static int cxl_mem_mbox_get(struct cxl_mem *cxlm)
{
- struct device *dev = &cxlm->pdev->dev;
+ struct device *dev = cxlm->dev;
u64 md_status;
int rc;
u64 in_payload, u64 out_payload,
s32 *size_out, u32 *retval)
{
- struct device *dev = &cxlm->pdev->dev;
+ struct device *dev = cxlm->dev;
struct mbox_cmd mbox_cmd = {
.opcode = cmd->opcode,
.size_in = cmd->info.size_in,
*/
cxlm->payload_size = min_t(size_t, cxlm->payload_size, SZ_1M);
if (cxlm->payload_size < 256) {
- dev_err(&cxlm->pdev->dev, "Mailbox is too small (%zub)",
+ dev_err(cxlm->dev, "Mailbox is too small (%zub)",
cxlm->payload_size);
return -ENXIO;
}
- dev_dbg(&cxlm->pdev->dev, "Mailbox payload sized %zu",
+ dev_dbg(cxlm->dev, "Mailbox payload sized %zu",
cxlm->payload_size);
return 0;
}
mutex_init(&cxlm->mbox_mutex);
- cxlm->pdev = pdev;
+ cxlm->dev = dev;
cxlm->enabled_cmds =
devm_kmalloc_array(dev, BITS_TO_LONGS(cxl_cmd_count),
sizeof(unsigned long),
static void __iomem *cxl_mem_map_regblock(struct cxl_mem *cxlm,
u8 bar, u64 offset)
{
- struct pci_dev *pdev = cxlm->pdev;
- struct device *dev = &pdev->dev;
void __iomem *addr;
+ struct device *dev = cxlm->dev;
+ struct pci_dev *pdev = to_pci_dev(dev);
/* Basic sanity check that BAR is big enough */
if (pci_resource_len(pdev, bar) < offset) {
static void cxl_mem_unmap_regblock(struct cxl_mem *cxlm, void __iomem *base)
{
- pci_iounmap(cxlm->pdev, base);
+ pci_iounmap(to_pci_dev(cxlm->dev), base);
}
static int cxl_mem_dvsec(struct pci_dev *pdev, int dvsec)
static int cxl_probe_regs(struct cxl_mem *cxlm, void __iomem *base,
struct cxl_register_map *map)
{
- struct pci_dev *pdev = cxlm->pdev;
+ struct pci_dev *pdev = to_pci_dev(cxlm->dev);
struct device *dev = &pdev->dev;
struct cxl_component_reg_map *comp_map;
struct cxl_device_reg_map *dev_map;
static int cxl_map_regs(struct cxl_mem *cxlm, struct cxl_register_map *map)
{
- struct pci_dev *pdev = cxlm->pdev;
+ struct pci_dev *pdev = to_pci_dev(cxlm->dev);
struct device *dev = &pdev->dev;
switch (map->reg_type) {
*/
static int cxl_mem_setup_regs(struct cxl_mem *cxlm)
{
- struct pci_dev *pdev = cxlm->pdev;
- struct device *dev = &pdev->dev;
+ struct pci_dev *pdev = to_pci_dev(cxlm->dev);
+ struct device *dev = cxlm->dev;
u32 regloc_size, regblocks;
void __iomem *base;
int regloc, i, n_maps;
struct cxl_mem_command *cmd = cxl_mem_find_command(opcode);
if (!cmd) {
- dev_dbg(&cxlm->pdev->dev,
+ dev_dbg(cxlm->dev,
"Opcode 0x%04x unsupported by driver", opcode);
continue;
}
static int cxl_mem_enumerate_cmds(struct cxl_mem *cxlm)
{
struct cxl_mbox_get_supported_logs *gsl;
- struct device *dev = &cxlm->pdev->dev;
+ struct device *dev = cxlm->dev;
struct cxl_mem_command *cmd;
int i, rc;
cxlm->partition_align_bytes = le64_to_cpu(id.partition_align);
cxlm->partition_align_bytes *= CXL_CAPACITY_MULTIPLIER;
- dev_dbg(&cxlm->pdev->dev, "Identify Memory Device\n"
+ dev_dbg(cxlm->dev,
+ "Identify Memory Device\n"
" total_bytes = %#llx\n"
" volatile_only_bytes = %#llx\n"
" persistent_only_bytes = %#llx\n"
" partition_align_bytes = %#llx\n",
- cxlm->total_bytes,
- cxlm->volatile_only_bytes,
- cxlm->persistent_only_bytes,
- cxlm->partition_align_bytes);
+ cxlm->total_bytes, cxlm->volatile_only_bytes,
+ cxlm->persistent_only_bytes, cxlm->partition_align_bytes);
cxlm->lsa_size = le32_to_cpu(id.lsa_size);
memcpy(cxlm->firmware_version, id.fw_revision, sizeof(id.fw_revision));
&cxlm->next_volatile_bytes,
&cxlm->next_persistent_bytes);
if (rc < 0) {
- dev_err(&cxlm->pdev->dev, "Failed to query partition information\n");
+ dev_err(cxlm->dev, "Failed to query partition information\n");
return rc;
}
- dev_dbg(&cxlm->pdev->dev, "Get Partition Info\n"
+ dev_dbg(cxlm->dev,
+ "Get Partition Info\n"
" active_volatile_bytes = %#llx\n"
" active_persistent_bytes = %#llx\n"
" next_volatile_bytes = %#llx\n"
" next_persistent_bytes = %#llx\n",
- cxlm->active_volatile_bytes,
- cxlm->active_persistent_bytes,
- cxlm->next_volatile_bytes,
- cxlm->next_persistent_bytes);
+ cxlm->active_volatile_bytes, cxlm->active_persistent_bytes,
+ cxlm->next_volatile_bytes, cxlm->next_persistent_bytes);
cxlm->ram_range.start = 0;
cxlm->ram_range.end = cxlm->active_volatile_bytes - 1;