]> www.infradead.org Git - nvme.git/commitdiff
riscv: Add vendor extensions to /proc/cpuinfo
authorCharlie Jenkins <charlie@rivosinc.com>
Fri, 19 Jul 2024 16:15:19 +0000 (09:15 -0700)
committerPalmer Dabbelt <palmer@rivosinc.com>
Mon, 22 Jul 2024 22:36:55 +0000 (15:36 -0700)
All of the supported vendor extensions that have been listed in
riscv_isa_vendor_ext_list can be exported through /proc/cpuinfo.

Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
Reviewed-by: Evan Green <evan@rivosinc.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240719-support_vendor_extensions-v3-2-0af7587bbec0@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/kernel/cpu.c

index c1f3655238fd2b906db466295d5c3274c67d916c..f6b13e9f5e6cb65649779786f36417a2691f8e40 100644 (file)
@@ -16,6 +16,7 @@
 #include <asm/sbi.h>
 #include <asm/smp.h>
 #include <asm/pgtable.h>
+#include <asm/vendor_extensions.h>
 
 bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
 {
@@ -235,7 +236,33 @@ arch_initcall(riscv_cpuinfo_init);
 
 #ifdef CONFIG_PROC_FS
 
-static void print_isa(struct seq_file *f, const unsigned long *isa_bitmap)
+#define ALL_CPUS -1
+
+static void print_vendor_isa(struct seq_file *f, int cpu)
+{
+       struct riscv_isavendorinfo *vendor_bitmap;
+       struct riscv_isa_vendor_ext_data_list *ext_list;
+       const struct riscv_isa_ext_data *ext_data;
+
+       for (int i = 0; i < riscv_isa_vendor_ext_list_size; i++) {
+               ext_list = riscv_isa_vendor_ext_list[i];
+               ext_data = riscv_isa_vendor_ext_list[i]->ext_data;
+
+               if (cpu == ALL_CPUS)
+                       vendor_bitmap = &ext_list->all_harts_isa_bitmap;
+               else
+                       vendor_bitmap = &ext_list->per_hart_isa_bitmap[cpu];
+
+               for (int j = 0; j < ext_list->ext_data_count; j++) {
+                       if (!__riscv_isa_extension_available(vendor_bitmap->isa, ext_data[j].id))
+                               continue;
+
+                       seq_printf(f, "_%s", ext_data[j].name);
+               }
+       }
+}
+
+static void print_isa(struct seq_file *f, const unsigned long *isa_bitmap, int cpu)
 {
 
        if (IS_ENABLED(CONFIG_32BIT))
@@ -254,6 +281,8 @@ static void print_isa(struct seq_file *f, const unsigned long *isa_bitmap)
                seq_printf(f, "%s", riscv_isa_ext[i].name);
        }
 
+       print_vendor_isa(f, cpu);
+
        seq_puts(f, "\n");
 }
 
@@ -316,7 +345,7 @@ static int c_show(struct seq_file *m, void *v)
         * line.
         */
        seq_puts(m, "isa\t\t: ");
-       print_isa(m, NULL);
+       print_isa(m, NULL, ALL_CPUS);
        print_mmu(m);
 
        if (acpi_disabled) {
@@ -338,7 +367,7 @@ static int c_show(struct seq_file *m, void *v)
         * additional extensions not present across all harts.
         */
        seq_puts(m, "hart isa\t: ");
-       print_isa(m, hart_isa[cpu_id].isa);
+       print_isa(m, hart_isa[cpu_id].isa, cpu_id);
        seq_puts(m, "\n");
 
        return 0;