]> www.infradead.org Git - users/hch/misc.git/commitdiff
media: venus: firmware: Use correct reset sequence for IRIS2
authorStephan Gerhold <stephan.gerhold@linaro.org>
Wed, 20 Aug 2025 15:16:39 +0000 (17:16 +0200)
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>
Tue, 9 Sep 2025 13:59:15 +0000 (15:59 +0200)
When starting venus with the "no_tz" code path, IRIS2 needs the same
boot/reset sequence as IRIS2_1. This is because most of the registers were
moved to the "wrapper_tz_base", which is already defined for both IRIS2 and
IRIS2_1 inside core.c. Add IRIS2 to the checks inside firmware.c as well to
make sure that it uses the correct reset sequence.

Both IRIS2 and IRIS2_1 are HFI v6 variants, so the correct sequence was
used before commit c38610f8981e ("media: venus: firmware: Sanitize
per-VPU-version").

Fixes: c38610f8981e ("media: venus: firmware: Sanitize per-VPU-version")
Cc: stable@vger.kernel.org
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Vikash Garodia <quic_vgarodia@quicinc.com>
Reviewed-by: Dikshita Agarwal <quic_dikshita@quicinc.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
[bod: Fixed commit log IRIS -> IRIS2]
Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
drivers/media/platform/qcom/venus/firmware.c

index 66a18830e66dac2acbe11751a8c250876e20d795..4e2636b0536693a86dc51503d01dc2bca40b532a 100644 (file)
@@ -30,7 +30,7 @@ static void venus_reset_cpu(struct venus_core *core)
        u32 fw_size = core->fw.mapped_mem_size;
        void __iomem *wrapper_base;
 
-       if (IS_IRIS2_1(core))
+       if (IS_IRIS2(core) || IS_IRIS2_1(core))
                wrapper_base = core->wrapper_tz_base;
        else
                wrapper_base = core->wrapper_base;
@@ -42,7 +42,7 @@ static void venus_reset_cpu(struct venus_core *core)
        writel(fw_size, wrapper_base + WRAPPER_NONPIX_START_ADDR);
        writel(fw_size, wrapper_base + WRAPPER_NONPIX_END_ADDR);
 
-       if (IS_IRIS2_1(core)) {
+       if (IS_IRIS2(core) || IS_IRIS2_1(core)) {
                /* Bring XTSS out of reset */
                writel(0, wrapper_base + WRAPPER_TZ_XTSS_SW_RESET);
        } else {
@@ -68,7 +68,7 @@ int venus_set_hw_state(struct venus_core *core, bool resume)
        if (resume) {
                venus_reset_cpu(core);
        } else {
-               if (IS_IRIS2_1(core))
+               if (IS_IRIS2(core) || IS_IRIS2_1(core))
                        writel(WRAPPER_XTSS_SW_RESET_BIT,
                               core->wrapper_tz_base + WRAPPER_TZ_XTSS_SW_RESET);
                else
@@ -181,7 +181,7 @@ static int venus_shutdown_no_tz(struct venus_core *core)
        void __iomem *wrapper_base = core->wrapper_base;
        void __iomem *wrapper_tz_base = core->wrapper_tz_base;
 
-       if (IS_IRIS2_1(core)) {
+       if (IS_IRIS2(core) || IS_IRIS2_1(core)) {
                /* Assert the reset to XTSS */
                reg = readl(wrapper_tz_base + WRAPPER_TZ_XTSS_SW_RESET);
                reg |= WRAPPER_XTSS_SW_RESET_BIT;