#include <linux/moduleparam.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
+#include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/pm.h>
 #include <linux/i2c.h>
 {
        struct snd_soc_component *component = dai->component;
        struct nau8822 *nau8822 = snd_soc_component_get_drvdata(component);
+       unsigned long mclk_freq;
 
        nau8822->div_id = clk_id;
        nau8822->sysclk = freq;
+
+       if (nau8822->mclk) {
+               mclk_freq = clk_get_rate(nau8822->mclk);
+               if (mclk_freq != freq) {
+                       int ret = nau8822_set_pll(dai, NAU8822_CLK_MCLK,
+                               NAU8822_CLK_MCLK, mclk_freq, freq);
+                       if (ret) {
+                               dev_err(component->dev, "Failed to set PLL\n");
+                               return ret;
+                       }
+                       nau8822->div_id = NAU8822_CLK_PLL;
+               }
+       }
+
        dev_dbg(component->dev, "master sysclk %dHz, source %s\n", freq,
-               clk_id == NAU8822_CLK_PLL ? "PLL" : "MCLK");
+               nau8822->div_id == NAU8822_CLK_PLL ? "PLL" : "MCLK");
 
        return 0;
 }
 {
        struct snd_soc_component *component = dai->component;
        struct nau8822 *nau8822 = snd_soc_component_get_drvdata(component);
-       int val_len = 0, val_rate = 0;
+       int div = 0, val_len = 0, val_rate = 0;
        unsigned int ctrl_val, bclk_fs, bclk_div;
 
        /* make BCLK and LRC divide configuration if the codec as master. */
        /* If the master clock is from MCLK, provide the runtime FS for driver
         * to get the master clock prescaler configuration.
         */
-       if (nau8822->div_id == NAU8822_CLK_MCLK)
-               nau8822_config_clkdiv(dai, 0, params_rate(params));
+       if (nau8822->div_id != NAU8822_CLK_MCLK)
+               div = nau8822->pll.mclk_scaler;
+
+       nau8822_config_clkdiv(dai, div, params_rate(params));
 
        return 0;
 }
 static int nau8822_set_bias_level(struct snd_soc_component *component,
                                 enum snd_soc_bias_level level)
 {
+       struct nau8822 *nau8822 = snd_soc_component_get_drvdata(component);
+
        switch (level) {
        case SND_SOC_BIAS_ON:
                break;
 
        case SND_SOC_BIAS_PREPARE:
+               if (nau8822->mclk &&
+                       snd_soc_component_get_bias_level(component) != SND_SOC_BIAS_ON) {
+                       int ret = clk_prepare_enable(nau8822->mclk);
+
+                       if (ret) {
+                               dev_err(component->dev,
+                                       "Failed to enable MCLK: %d\n", ret);
+                               return ret;
+                       }
+               }
+
                snd_soc_component_update_bits(component,
                        NAU8822_REG_POWER_MANAGEMENT_1,
                        NAU8822_REFIMP_MASK, NAU8822_REFIMP_80K);
                break;
 
        case SND_SOC_BIAS_STANDBY:
+               if (nau8822->mclk &&
+                       snd_soc_component_get_bias_level(component) != SND_SOC_BIAS_OFF)
+                       clk_disable_unprepare(nau8822->mclk);
+
                snd_soc_component_update_bits(component,
                        NAU8822_REG_POWER_MANAGEMENT_1,
                        NAU8822_IOBUF_EN | NAU8822_ABIAS_EN,
        }
        i2c_set_clientdata(i2c, nau8822);
 
+       nau8822->mclk = devm_clk_get_optional(&i2c->dev, "mclk");
+       if (IS_ERR(nau8822->mclk))
+               return dev_err_probe(&i2c->dev, PTR_ERR(nau8822->mclk),
+                       "Error getting mclk\n");
+
        nau8822->regmap = devm_regmap_init_i2c(i2c, &nau8822_regmap_config);
        if (IS_ERR(nau8822->regmap)) {
                ret = PTR_ERR(nau8822->regmap);