]> www.infradead.org Git - users/dwmw2/linux.git/commitdiff
ASoC: nau8822: add MCLK support
authorAndrejs Cainikovs <andrejs.cainikovs@toradex.com>
Thu, 13 Jun 2024 08:46:52 +0000 (10:46 +0200)
committerMark Brown <broonie@kernel.org>
Tue, 18 Jun 2024 15:45:46 +0000 (16:45 +0100)
This change adds MCLK clock handling directly within driver.
When used in combination with simple-audio-card, and mclk-fs is set,
simple-audio-card will change MCLK frequency before configuring PLL.
In some cases, however, MCLK reference clock should be static (see [1]),
which means it needs to be moved away from simple-audio-card.

[1]: https://lore.kernel.org/all/ZfBdxrzX3EnPuGOn@ediswmail9.ad.cirrus.com/

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Link: https://msgid.link/r/20240613084652.13113-4-andrejs.cainikovs@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/codecs/nau8822.c
sound/soc/codecs/nau8822.h

index 5f9f0953aa2f101c5f0530d7bdd325b2c7c75863..e1cbaf8a944d8cf94992fbe249743a9c2d3d6259 100644 (file)
@@ -14,6 +14,7 @@
 #include <linux/moduleparam.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
+#include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/pm.h>
 #include <linux/i2c.h>
@@ -773,11 +774,26 @@ static int nau8822_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
 {
        struct snd_soc_component *component = dai->component;
        struct nau8822 *nau8822 = snd_soc_component_get_drvdata(component);
+       unsigned long mclk_freq;
 
        nau8822->div_id = clk_id;
        nau8822->sysclk = freq;
+
+       if (nau8822->mclk) {
+               mclk_freq = clk_get_rate(nau8822->mclk);
+               if (mclk_freq != freq) {
+                       int ret = nau8822_set_pll(dai, NAU8822_CLK_MCLK,
+                               NAU8822_CLK_MCLK, mclk_freq, freq);
+                       if (ret) {
+                               dev_err(component->dev, "Failed to set PLL\n");
+                               return ret;
+                       }
+                       nau8822->div_id = NAU8822_CLK_PLL;
+               }
+       }
+
        dev_dbg(component->dev, "master sysclk %dHz, source %s\n", freq,
-               clk_id == NAU8822_CLK_PLL ? "PLL" : "MCLK");
+               nau8822->div_id == NAU8822_CLK_PLL ? "PLL" : "MCLK");
 
        return 0;
 }
@@ -848,7 +864,7 @@ static int nau8822_hw_params(struct snd_pcm_substream *substream,
 {
        struct snd_soc_component *component = dai->component;
        struct nau8822 *nau8822 = snd_soc_component_get_drvdata(component);
-       int val_len = 0, val_rate = 0;
+       int div = 0, val_len = 0, val_rate = 0;
        unsigned int ctrl_val, bclk_fs, bclk_div;
 
        /* make BCLK and LRC divide configuration if the codec as master. */
@@ -915,8 +931,10 @@ static int nau8822_hw_params(struct snd_pcm_substream *substream,
        /* If the master clock is from MCLK, provide the runtime FS for driver
         * to get the master clock prescaler configuration.
         */
-       if (nau8822->div_id == NAU8822_CLK_MCLK)
-               nau8822_config_clkdiv(dai, 0, params_rate(params));
+       if (nau8822->div_id != NAU8822_CLK_MCLK)
+               div = nau8822->pll.mclk_scaler;
+
+       nau8822_config_clkdiv(dai, div, params_rate(params));
 
        return 0;
 }
@@ -940,17 +958,34 @@ static int nau8822_mute(struct snd_soc_dai *dai, int mute, int direction)
 static int nau8822_set_bias_level(struct snd_soc_component *component,
                                 enum snd_soc_bias_level level)
 {
+       struct nau8822 *nau8822 = snd_soc_component_get_drvdata(component);
+
        switch (level) {
        case SND_SOC_BIAS_ON:
                break;
 
        case SND_SOC_BIAS_PREPARE:
+               if (nau8822->mclk &&
+                       snd_soc_component_get_bias_level(component) != SND_SOC_BIAS_ON) {
+                       int ret = clk_prepare_enable(nau8822->mclk);
+
+                       if (ret) {
+                               dev_err(component->dev,
+                                       "Failed to enable MCLK: %d\n", ret);
+                               return ret;
+                       }
+               }
+
                snd_soc_component_update_bits(component,
                        NAU8822_REG_POWER_MANAGEMENT_1,
                        NAU8822_REFIMP_MASK, NAU8822_REFIMP_80K);
                break;
 
        case SND_SOC_BIAS_STANDBY:
+               if (nau8822->mclk &&
+                       snd_soc_component_get_bias_level(component) != SND_SOC_BIAS_OFF)
+                       clk_disable_unprepare(nau8822->mclk);
+
                snd_soc_component_update_bits(component,
                        NAU8822_REG_POWER_MANAGEMENT_1,
                        NAU8822_IOBUF_EN | NAU8822_ABIAS_EN,
@@ -1127,6 +1162,11 @@ static int nau8822_i2c_probe(struct i2c_client *i2c)
        }
        i2c_set_clientdata(i2c, nau8822);
 
+       nau8822->mclk = devm_clk_get_optional(&i2c->dev, "mclk");
+       if (IS_ERR(nau8822->mclk))
+               return dev_err_probe(&i2c->dev, PTR_ERR(nau8822->mclk),
+                       "Error getting mclk\n");
+
        nau8822->regmap = devm_regmap_init_i2c(i2c, &nau8822_regmap_config);
        if (IS_ERR(nau8822->regmap)) {
                ret = PTR_ERR(nau8822->regmap);
index 6ecd46e459230dc80b24e75f5cd4a325684e7846..13fe0a091e9ed4f2f95c4b8ae8a3e26b423b9310 100644 (file)
@@ -215,6 +215,7 @@ struct nau8822_pll {
 struct nau8822 {
        struct device *dev;
        struct regmap *regmap;
+       struct clk *mclk;
        struct nau8822_pll pll;
        int sysclk;
        int div_id;