drm/i915/display: Disintegrate sink alpm enable from psr with lobf

Make a generic alpm enable function for sink which can be used for
PSR2/PR/Lobf.

v1: Initial version.
v2: Move code comment to intel_psr_needs_alpm(). [Jouni]

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://lore.kernel.org/r/20250423092334.2294483-12-animesh.manna@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
index c4b6da2e6ccf61a52f7a2ef98b405e173fa1c180..482dd192d47dd3260e7acaee7d6f3de56f3aedc6 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_alpm.c
+++ b/drivers/gpu/drm/i915/display/intel_alpm.c
@@ -426,6 +426,23 @@ void intel_alpm_pre_plane_update(struct intel_atomic_state *state,
        }
 }
 
+static void intel_alpm_enable_sink(struct intel_dp *intel_dp,
+                                  const struct intel_crtc_state *crtc_state)
+{
+       u8 val;
+
+       if (!intel_psr_needs_alpm(intel_dp, crtc_state) && !crtc_state->has_lobf)
+               return;
+
+       val = DP_ALPM_ENABLE | DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE;
+
+       if (crtc_state->has_panel_replay || (crtc_state->has_lobf &&
+                                            intel_alpm_aux_less_wake_supported(intel_dp)))
+               val |= DP_ALPM_MODE_AUX_LESS;
+
+       drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG, val);
+}
+
 void intel_alpm_post_plane_update(struct intel_atomic_state *state,
                                  struct intel_crtc *crtc)
 {
@@ -449,8 +466,10 @@ void intel_alpm_post_plane_update(struct intel_atomic_state *state,
 
                intel_dp = enc_to_intel_dp(encoder);
 
-               if (intel_dp_is_edp(intel_dp))
+               if (intel_dp_is_edp(intel_dp)) {
+                       intel_alpm_enable_sink(intel_dp, crtc_state);
                        intel_alpm_configure(intel_dp, crtc_state);
+               }
        }
 }
 

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 53366663b58b96ca8a5c54e34559a1badcecd487..cc0cec0e85e99fdc28c80d3ef5f135f7f9184138 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -796,32 +796,9 @@ static void _psr_enable_sink(struct intel_dp *intel_dp,
        drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, val);
 }
 
-static void intel_psr_enable_sink_alpm(struct intel_dp *intel_dp,
-                                      const struct intel_crtc_state *crtc_state)
-{
-       u8 val;
-
-       /*
-        * eDP Panel Replay uses always ALPM
-        * PSR2 uses ALPM but PSR1 doesn't
-        */
-       if (!intel_dp_is_edp(intel_dp) || (!crtc_state->has_panel_replay &&
-                                          !crtc_state->has_sel_update))
-               return;
-
-       val = DP_ALPM_ENABLE | DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE;
-
-       if (crtc_state->has_panel_replay)
-               val |= DP_ALPM_MODE_AUX_LESS;
-
-       drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG, val);
-}
-
 static void intel_psr_enable_sink(struct intel_dp *intel_dp,
                                  const struct intel_crtc_state *crtc_state)
 {
-       intel_psr_enable_sink_alpm(intel_dp, crtc_state);
-
        crtc_state->has_panel_replay ?
                _panel_replay_enable_sink(intel_dp, crtc_state) :
                _psr_enable_sink(intel_dp, crtc_state);
@@ -4195,6 +4172,10 @@ void intel_psr_connector_debugfs_add(struct intel_connector *connector)
 
 bool intel_psr_needs_alpm(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state)
 {
+       /*
+        * eDP Panel Replay uses always ALPM
+        * PSR2 uses ALPM but PSR1 doesn't
+        */
        return intel_dp_is_edp(intel_dp) && (crtc_state->has_sel_update ||
                                             crtc_state->has_panel_replay);
 }