]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
libbpf, riscv: Use a0 for RC register
authorYixun Lan <dlan@gentoo.org>
Wed, 6 Jul 2022 14:02:04 +0000 (22:02 +0800)
committerDaniel Borkmann <daniel@iogearbox.net>
Thu, 7 Jul 2022 14:30:04 +0000 (16:30 +0200)
According to the RISC-V calling convention register usage here [0], a0
is used as return value register, so rename it to make it consistent
with the spec.

  [0] section 18.2, table 18.2
      https://riscv.org/wp-content/uploads/2015/01/riscv-calling.pdf

Fixes: 589fed479ba1 ("riscv, libbpf: Add RISC-V (RV64) support to bpf_tracing.h")
Signed-off-by: Yixun Lan <dlan@gentoo.org>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Acked-by: Björn Töpel <bjorn@kernel.org>
Acked-by: Amjad OULED-AMEUR <ouledameur.amjad@gmail.com>
Link: https://lore.kernel.org/bpf/20220706140204.47926-1-dlan@gentoo.org
tools/lib/bpf/bpf_tracing.h

index 01ce121c302dfeeff2f0887d9c30c2449581ca92..11f9096407fc4081b2ffbdd4ebc23916d6faf73b 100644 (file)
@@ -233,7 +233,7 @@ struct pt_regs___arm64 {
 #define __PT_PARM5_REG a4
 #define __PT_RET_REG ra
 #define __PT_FP_REG s0
-#define __PT_RC_REG a5
+#define __PT_RC_REG a0
 #define __PT_SP_REG sp
 #define __PT_IP_REG pc
 /* riscv does not select ARCH_HAS_SYSCALL_WRAPPER. */