#define ETH_MAX_WIN            6
 #define ETH_MAX_REMAP_WIN      4
 
-/*
- * USB Address Decode Windows registers
- */
-#define USB_WIN_CTRL(i, w)     ((i == 0) ? ORION_USB0_REG(0x320 + ((w) << 4)) \
-                                       : ORION_USB1_REG(0x320 + ((w) << 4)))
-#define USB_WIN_BASE(i, w)     ((i == 0) ? ORION_USB0_REG(0x324 + ((w) << 4)) \
-                                       : ORION_USB1_REG(0x324 + ((w) << 4)))
-#define USB_MAX_WIN            4
-
 /*
  * SATA Address Decode Windows registers
  */
        orion_mbus_dram_info.num_cs = cs;
 }
 
-void __init orion_setup_usb_wins(void)
-{
-       int i;
-       u32 usb_if, dev, rev;
-       u32 max_usb_if = 1;
-
-       orion_pcie_id(&dev, &rev);
-       if (dev == MV88F5182_DEV_ID)
-               max_usb_if = 2;
-
-       for (usb_if = 0; usb_if < max_usb_if; usb_if++) {
-               /*
-                * First, disable and clear windows
-                */
-               for (i = 0; i < USB_MAX_WIN; i++) {
-                       orion_write(USB_WIN_BASE(usb_if, i), 0);
-                       orion_write(USB_WIN_CTRL(usb_if, i), 0);
-               }
-
-               /*
-                * Setup windows for DDR banks.
-                */
-               for (i = 0; i < DDR_MAX_CS; i++) {
-                       u32 base, size;
-                       size = orion_read(DDR_SIZE_CS(i));
-                       base = orion_read(DDR_BASE_CS(i));
-                       if (size & DDR_BANK_EN) {
-                               base = DDR_REG_TO_BASE(base);
-                               size = DDR_REG_TO_SIZE(size);
-                               orion_write(USB_WIN_CTRL(usb_if, i),
-                                               ((size-1) & 0xffff0000) |
-                                               (ATTR_DDR_CS(i) << 8) |
-                                               (TARGET_DDR << 4) | WIN_EN);
-                               orion_write(USB_WIN_BASE(usb_if, i),
-                                               base & 0xffff0000);
-                       }
-               }
-       }
-}
-
 void __init orion_setup_eth_wins(void)
 {
        int i;
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/arch/hardware.h>
+#include <asm/arch/platform.h>
 #include "common.h"
 
 /*****************************************************************************
        },
 };
 
+static struct orion_ehci_data orion_ehci_data = {
+       .dram           = &orion_mbus_dram_info,
+};
+
 static u64 ehci_dmamask = 0xffffffffUL;
 
 static struct platform_device orion_ehci0 = {
        .dev            = {
                .dma_mask               = &ehci_dmamask,
                .coherent_dma_mask      = 0xffffffff,
+               .platform_data          = &orion_ehci_data,
        },
        .resource       = orion_ehci0_resources,
        .num_resources  = ARRAY_SIZE(orion_ehci0_resources),
        .dev            = {
                .dma_mask               = &ehci_dmamask,
                .coherent_dma_mask      = 0xffffffff,
+               .platform_data          = &orion_ehci_data,
        },
        .resource       = orion_ehci1_resources,
        .num_resources  = ARRAY_SIZE(orion_ehci1_resources),
         * Setup Orion address map
         */
        orion_setup_cpu_wins();
-       orion_setup_usb_wins();
        orion_setup_eth_wins();
        if (dev == MV88F5182_DEV_ID)
                orion_setup_sata_wins();
 
 void orion_setup_cpu_win(enum orion_target target, u32 base, u32 size, int remap);
 void orion_setup_cpu_wins(void);
 void orion_setup_eth_wins(void);
-void orion_setup_usb_wins(void);
 void orion_setup_sata_wins(void);
 
 /*
 
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/platform_device.h>
+#include <linux/mbus.h>
 #include <asm/arch/orion.h>
+#include <asm/arch/platform.h>
 
 #define rdl(off)       __raw_readl(hcd->regs + (off))
 #define wrl(off, val)  __raw_writel((val), hcd->regs + (off))
 
-#define USB_CAUSE              0x310
-#define USB_MASK               0x314
 #define USB_CMD                        0x140
 #define USB_MODE               0x1a8
+#define USB_CAUSE              0x310
+#define USB_MASK               0x314
+#define USB_WINDOW_CTRL(i)     (0x320 + ((i) << 4))
+#define USB_WINDOW_BASE(i)     (0x324 + ((i) << 4))
 #define USB_IPG                        0x360
 #define USB_PHY_PWR_CTRL       0x400
 #define USB_PHY_TX_CTRL                0x420
        .bus_resume = ehci_bus_resume,
 };
 
+static void __init
+ehci_orion_conf_mbus_windows(struct usb_hcd *hcd,
+                               struct mbus_dram_target_info *dram)
+{
+       int i;
+
+       for (i = 0; i < 4; i++) {
+               wrl(USB_WINDOW_CTRL(i), 0);
+               wrl(USB_WINDOW_BASE(i), 0);
+       }
+
+       for (i = 0; i < dram->num_cs; i++) {
+               struct mbus_dram_window *cs = dram->cs + i;
+
+               wrl(USB_WINDOW_CTRL(i), ((cs->size - 1) & 0xffff0000) |
+                                       (cs->mbus_attr << 8) |
+                                       (dram->mbus_dram_target_id << 4) | 1);
+               wrl(USB_WINDOW_BASE(i), cs->base);
+       }
+}
+
 static int __init ehci_orion_drv_probe(struct platform_device *pdev)
 {
+       struct orion_ehci_data *pd = pdev->dev.platform_data;
        struct resource *res;
        struct usb_hcd *hcd;
        struct ehci_hcd *ehci;
        ehci->is_tdi_rh_tt = 1;
        ehci->sbrn = 0x20;
 
+       /*
+        * (Re-)program MBUS remapping windows if we are asked to.
+        */
+       if (pd != NULL && pd->dram != NULL)
+               ehci_orion_conf_mbus_windows(hcd, pd->dram);
+
        /*
         * setup Orion USB controller
         */
 
 #ifndef __ASM_ARCH_PLATFORM_H__
 #define __ASM_ARCH_PLATFORM_H__
 
+/*
+ * Orion EHCI platform driver data.
+ */
+struct orion_ehci_data {
+       struct mbus_dram_target_info    *dram;
+};
+
+
 /*
  * Device bus NAND private data
  */
        u8 width;       /* buswidth */
 };
 
+
 #endif