]> www.infradead.org Git - linux.git/commitdiff
arm64: dts: meson: a1: add saradc definition
authorGeorge Stark <GNStark@sberdevices.ru>
Wed, 23 Aug 2023 21:36:26 +0000 (00:36 +0300)
committerNeil Armstrong <neil.armstrong@linaro.org>
Mon, 11 Sep 2023 09:42:52 +0000 (11:42 +0200)
Add saradc node to Amlogic Meson A1 SoC main dtsi. Saradc is
Successive Approximation Register (SAR) A/D Converter.

Signed-off-by: George Stark <GNStark@sberdevices.ru>
Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230823213630.12936-12-ddrokosov@sberdevices.ru
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
arch/arm64/boot/dts/amlogic/meson-a1.dtsi

index d20712ffc2f831e900966591771619ecca7b9ce3..953851f4ae4db0c6051210f98a743a0c28ebaeea 100644 (file)
                                status = "disabled";
                        };
 
+                       saradc: adc@2c00 {
+                               compatible = "amlogic,meson-g12a-saradc",
+                                       "amlogic,meson-saradc";
+                               reg = <0x0 0x2c00 0x0 0x48>;
+                               #io-channel-cells = <1>;
+                               power-domains = <&pwrc PWRC_I2C_ID>;
+                               interrupts = <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>;
+                               clocks = <&xtal>,
+                                       <&clkc_periphs CLKID_SARADC_EN>,
+                                       <&clkc_periphs CLKID_SARADC>,
+                                       <&clkc_periphs CLKID_SARADC_SEL>;
+                               clock-names = "clkin", "core",
+                                       "adc_clk", "adc_sel";
+                               status = "disabled";
+                       };
+
                        usb2_phy1: phy@4000 {
                                compatible = "amlogic,a1-usb2-phy";
                                clocks = <&clkc_periphs CLKID_USB_PHY_IN>;