dts: arm64: amlogic: add S7 pinctrl node

Add pinctrl device to support Amlogic S7.

Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Link: https://lore.kernel.org/r/20250527-s6-s7-pinctrl-v3-4-44f6a0451519@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi
index f0c172681bd1f4565792ecb646d5f8d1fcf9fcf7..260918b37b9ae283fb2e0f863997f507e0a7463a 100644 (file)
--- a/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi
+++ b/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi
@@ -6,6 +6,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/amlogic,pinctrl.h>
 
 / {
        cpus {
@@ -94,6 +95,86 @@
                                clock-names = "xtal", "pclk", "baud";
                                status = "disabled";
                        };
+
+                       periphs_pinctrl: pinctrl@4000 {
+                               compatible = "amlogic,pinctrl-s7";
+                               #address-cells = <2>;
+                               #size-cells = <2>;
+                               ranges = <0x0 0x0 0x0 0x4000 0x0 0x340>;
+
+                               gpioz: gpio@c0 {
+                                       reg = <0 0xc0 0 0x20>, <0 0x18 0 0x8>;
+                                       reg-names = "gpio", "mux";
+                                       gpio-controller;
+                                       #gpio-cells = <2>;
+                                       gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_Z<<8) 13>;
+                               };
+
+                               gpiox: gpio@100 {
+                                       reg = <0 0x100 0 0x30>, <0 0xc 0 0x8>;
+                                       reg-names = "gpio", "mux";
+                                       gpio-controller;
+                                       #gpio-cells = <2>;
+                                       gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_X<<8) 20>;
+                               };
+
+                               gpioh: gpio@140 {
+                                       reg = <0 0x140 0 0x20>, <0 0x2c 0 0x8>;
+                                       reg-names = "gpio", "mux";
+                                       gpio-controller;
+                                       #gpio-cells = <2>;
+                                       gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_H<<8) 12>;
+                               };
+
+                               gpiod: gpio@180 {
+                                       reg = <0 0x180 0 0x20>, <0 0x40 0 0x8>;
+                                       reg-names = "gpio", "mux";
+                                       gpio-controller;
+                                       #gpio-cells = <2>;
+                                       gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_D<<8) 12>;
+                               };
+
+                               gpioe: gpio@1c0 {
+                                       reg = <0 0x1c0 0 0x20>, <0 0x48 0 0x4>;
+                                       reg-names = "gpio", "mux";
+                                       gpio-controller;
+                                       #gpio-cells = <2>;
+                                       gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_E<<8) 2>;
+                               };
+
+                               gpioc: gpio@200 {
+                                       reg = <0 0x200 0 0x20>, <0 0x24 0 0x4>;
+                                       reg-names = "gpio", "mux";
+                                       gpio-controller;
+                                       #gpio-cells = <2>;
+                                       gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_C<<8) 8>;
+                               };
+
+                               gpiob: gpio@240 {
+                                       reg = <0 0x240 0 0x20>, <0 0x0 0 0x8>;
+                                       reg-names = "gpio", "mux";
+                                       gpio-controller;
+                                       #gpio-cells = <2>;
+                                       gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_B<<8) 14>;
+                               };
+
+                               test_n: gpio@2c0 {
+                                       reg = <0 0x2c0 0 0x20>;
+                                       reg-names = "gpio";
+                                       gpio-controller;
+                                       #gpio-cells = <2>;
+                                       gpio-ranges =
+                                               <&periphs_pinctrl 0 (AMLOGIC_GPIO_TEST_N<<8) 1>;
+                               };
+
+                               gpiocc: gpio@300 {
+                                       reg = <0 0x300 0 0x20>, <0 0x14 0 0x4>;
+                                       reg-names = "gpio", "mux";
+                                       gpio-controller;
+                                       #gpio-cells = <2>;
+                                       gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_CC<<8) 2>;
+                               };
+                       };
                };
        };
 };